ARM64: Optimize generated code for gaps

src/arm64/delayed-masm-arm64.h

Index: src/arm64/delayed-masm-arm64.h
diff --git a/src/arm64/delayed-masm-arm64.h b/src/arm64/delayed-masm-arm64.h
new file mode 100644
index 0000000000000000000000000000000000000000..80d4f5eb812728ef637d0969798600046bb3388f
--- /dev/null
+++ b/src/arm64/delayed-masm-arm64.h
@@ -0,0 +1,142 @@
+// Copyright 2013 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_ARM64_DELAYED_MASM_ARM64_H_
+#define V8_ARM64_DELAYED_MASM_ARM64_H_
+
+#include "src/lithium.h"
+
+namespace v8 {
+namespace internal {
+
+class LCodeGen;
+
+// This class delays the generation of some instructions. This way, we have a
+// chance to merge two instructions in one (with load/store pair).
+// Each instruction must either:
+//  - merge with the pending instruction and generate just one instruction.
+//  - emit the pending instruction and then generate the instruction (or set the
+//    pending instruction).
+class DelayedMasm BASE_EMBEDDED {
+ public:
+  explicit DelayedMasm(LCodeGen* owner, MacroAssembler* masm)
+    : cgen_(owner), masm_(masm), need_to_restore_root_(false), pending_(kNone),
+      saved_value_(0) {
+#ifdef DEBUG
+    pending_register_ = no_reg;
+    pending_value_ = 0;
+    pending_pc_ = 0;
+#endif
+  }
+  ~DelayedMasm() {
+    ASSERT(!need_to_restore_root_);
+    ASSERT(!pending());
+  }
+  inline void EndDelayedUse();
+
+  // We use the root register as an extra scratch register.
+  // The root register has two advantages:
+  //  - It is not in crankshaft allocatable registers list, so it can't
+  //    interfere with the allocatable registers.
+  //  - We don't need to push it on the stack, as we can reload it with its
+  //    value once we have finish.
+  const Register& ScratchRegister() {
+    need_to_restore_root_ = true;

[ulan, 2014/06/04 09:28:19]

I think the root register and its management belong to GapResolver because it is
used both for breaking cycles and for storing constants. GapResolver knows that
it is correct because constant moves come after breaking cycles, but there is no
way to tell that by just looking at this class. So having root register in this
class introduces some implicit dependency between GapResolver and this class.

Can we instead pass the scratch register to StoreConstant and flush it in
EmitPending/ResetPending ?

[vincent.belliard, 2014/06/09 10:31:15]

The scratch register is now defined by the caller (i.e. the new DelayedGapMasm
class). The new convention is that the scratch register is now used for
constants (StoreConstant). If the user of the DelayedMasm want to use the
scratch register, it must acquire/release it.
In debug, I added all the checks to ensure that the uses are consistent (for
example, that the gap resolver doesn't call StoreConstant between
acquire/release of the scratch register).

+    return root;
+  }
+  bool IsScratchRegister(const CPURegister& reg) {
+    return reg.Is(root);
+  }
+  bool pending() { return pending_ != kNone; }
+
+  // Extra layer over the macro-assembler instructions (which emits the
+  // potential pending instruction).
+  inline void Mov(const Register& rd,
+                  const Operand& operand,
+                  DiscardMoveMode discard_mode = kDontDiscardForSameWReg);
+  inline void Fmov(FPRegister fd, FPRegister fn);
+  inline void Fmov(FPRegister fd, double imm);
+  inline void LoadObject(Register result, Handle<Object> object);
+  // Instructions which try to merge which the pending instructions.
+  void StackSlotMove(LOperand* src, LOperand* dst);
+  void StoreConstant(uint64_t value, const MemOperand& operand);
+  void Load(const CPURegister& rd, const MemOperand& operand);
+  void Store(const CPURegister& rd, const MemOperand& operand);
+  // Emit the potential pending instruction.
+  void EmitPending();
+  // Reset the pending state.
+  void ResetPending() {
+    pending_ = kNone;
+#ifdef DEBUG
+    pending_register_ = no_reg;
+    MemOperand tmp;
+    pending_address_src_ = tmp;
+    pending_address_dst_ = tmp;
+    pending_value_ = 0;
+    pending_pc_ = 0;
+#endif
+  }
+
+ private:
+  // Set the saved value and load the ScratchRegister with it.
+  void SetSavedValue(uint64_t saved_value) {
+    ASSERT(saved_value != 0);
+    if (saved_value_ != saved_value) {
+      masm_->Mov(ScratchRegister(), saved_value);
+      saved_value_ = saved_value;
+    }
+  }
+  // Reset the saved value (i.e. the value of ScratchRegister is no longer
+  // known).
+  void ResetSavedValue() {
+    saved_value_ = 0;
+  }
+
+  LCodeGen* cgen_;
+  MacroAssembler* masm_;
+
+  // We use the root register as a scratch in a few places. When that happens,
+  // this flag is set to indicate that it needs to be restored.
+  bool need_to_restore_root_;
+
+  // Sometimes we store or load two values in two contiguous stack slots.
+  // In this case, we try to use the ldp/stp instructions to reduce code size.
+  // To be able to do that, instead of generating directly the instructions,
+  // we register with the following fields that an instruction needs to be
+  // generated. Then with the next instruction, if the instruction is
+  // consistent with the pending one for stp/ldp we generate ldp/stp. Else,
+  // if they are not consistent, we generate the pending instruction and we
+  // register the new instruction (which becomes pending).
+
+  // Enumeration of instructions which can be pending.
+  enum Pending {
+    kNone,
+    kStoreConstant,
+    kLoad, kStore,
+    kStackSlotMove
+  };
+  // The pending instruction.
+  Pending pending_;
+  // For kLoad, kStore: register which must be loaded/stored.
+  CPURegister pending_register_;
+  // For kLoad, kStackSlotMove: address of the load.
+  MemOperand pending_address_src_;
+  // For kStoreConstant, kStore, kStackSlotMove: address of the store.
+  MemOperand pending_address_dst_;
+  // For kStoreConstant: value to be stored.
+  uint64_t pending_value_;
+  // Value held into the ScratchRegister (root register) if
+  // the saved_value_ is not 0 (for 0, we use xzr).
+  uint64_t saved_value_;
+#ifdef DEBUG
+  // Address where the pending instruction must be generated. It's only used to
+  // check that nothing else has been generated since we set the pending
+  // instruction.
+  int pending_pc_;
+#endif
+};
+
+} }  // namespace v8::internal
+
+#endif  // V8_ARM64_DELAYED_MASM_ARM64_H_