[SubZero] Generate spin-lock for atomic load store

src/IceTargetLowering.def

Index: src/IceTargetLowering.def
diff --git a/src/IceTargetLowering.def b/src/IceTargetLowering.def
index f465571e539d893c2d072523f5eca1a752230ab8..634f2f35239a9a16ba7ef5858a91f57b444feebc 100644
--- a/src/IceTargetLowering.def
+++ b/src/IceTargetLowering.def
@@ -45,6 +45,13 @@
   X(sitofp_i64_f64,     "__Sz_sitofp_i64_f64")                                 \
   X(srem_i32,           "__modsi3")                                            \
   X(srem_i64,           "__moddi3")                                            \
+  X(sync_f_n_add_8,     "__sync_fetch_and_add_8")                              \

[Jim Stichnoth, 2017/02/07 17:45:43]

Sort these lines alphabetically, for consistency.

[jaydeep.patil, 2017/02/08 05:08:25]

Done.

+  X(sync_f_n_sub_8,     "__sync_fetch_and_sub_8")                              \
+  X(sync_f_n_or_8,      "__sync_fetch_and_or_8")                               \
+  X(sync_f_n_and_8,     "__sync_fetch_and_and_8")                              \
+  X(sync_f_n_xor_8,     "__sync_fetch_and_xor_8")                              \
+  X(sync_lock_tset_8,   "__sync_lock_test_and_set_8")                          \
+  X(sync_val_cx_8,      "__sync_val_compare_and_swap_8")                       \
   X(udiv_i32,           "__udivsi3")                                           \
   X(udiv_i64,           "__udivdi3")                                           \
   X(uitofp_4xi32_4xf32, "__Sz_uitofp_4xi32_4xf32")                             \