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Side by Side Diff: src/compiler/arm/instruction-scheduler-arm.cc

Issue 2668013003: [Turbofan] Add more integer SIMD operations for ARM. (Closed)
Patch Set: Fix compile. Created 3 years, 10 months ago
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1 // Copyright 2015 the V8 project authors. All rights reserved. 1 // Copyright 2015 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-scheduler.h" 5 #include "src/compiler/instruction-scheduler.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 107 matching lines...) Expand 10 before | Expand all | Expand 10 after
118 case kArmFloat32x4Add: 118 case kArmFloat32x4Add:
119 case kArmFloat32x4Sub: 119 case kArmFloat32x4Sub:
120 case kArmFloat32x4Equal: 120 case kArmFloat32x4Equal:
121 case kArmFloat32x4NotEqual: 121 case kArmFloat32x4NotEqual:
122 case kArmInt32x4Splat: 122 case kArmInt32x4Splat:
123 case kArmInt32x4ExtractLane: 123 case kArmInt32x4ExtractLane:
124 case kArmInt32x4ReplaceLane: 124 case kArmInt32x4ReplaceLane:
125 case kArmInt32x4FromFloat32x4: 125 case kArmInt32x4FromFloat32x4:
126 case kArmUint32x4FromFloat32x4: 126 case kArmUint32x4FromFloat32x4:
127 case kArmInt32x4Neg: 127 case kArmInt32x4Neg:
128 case kArmInt32x4ShiftLeftByScalar:
129 case kArmInt32x4ShiftRightByScalar:
128 case kArmInt32x4Add: 130 case kArmInt32x4Add:
129 case kArmInt32x4Sub: 131 case kArmInt32x4Sub:
130 case kArmInt32x4Mul: 132 case kArmInt32x4Mul:
131 case kArmInt32x4Min: 133 case kArmInt32x4Min:
132 case kArmInt32x4Max: 134 case kArmInt32x4Max:
133 case kArmInt32x4Equal: 135 case kArmInt32x4Equal:
134 case kArmInt32x4NotEqual: 136 case kArmInt32x4NotEqual:
135 case kArmInt32x4GreaterThan: 137 case kArmInt32x4GreaterThan:
136 case kArmInt32x4GreaterThanOrEqual: 138 case kArmInt32x4GreaterThanOrEqual:
139 case kArmUint32x4ShiftRightByScalar:
140 case kArmUint32x4Min:
141 case kArmUint32x4Max:
137 case kArmUint32x4GreaterThan: 142 case kArmUint32x4GreaterThan:
138 case kArmUint32x4GreaterThanOrEqual: 143 case kArmUint32x4GreaterThanOrEqual:
139 case kArmSimd32x4Select: 144 case kArmSimd32x4Select:
140 case kArmInt16x8Splat: 145 case kArmInt16x8Splat:
141 case kArmInt16x8ExtractLane: 146 case kArmInt16x8ExtractLane:
142 case kArmInt16x8ReplaceLane: 147 case kArmInt16x8ReplaceLane:
143 case kArmInt16x8Neg: 148 case kArmInt16x8Neg:
149 case kArmInt16x8ShiftLeftByScalar:
150 case kArmInt16x8ShiftRightByScalar:
144 case kArmInt16x8Add: 151 case kArmInt16x8Add:
152 case kArmInt16x8AddSaturate:
145 case kArmInt16x8Sub: 153 case kArmInt16x8Sub:
154 case kArmInt16x8SubSaturate:
146 case kArmInt16x8Mul: 155 case kArmInt16x8Mul:
147 case kArmInt16x8Min: 156 case kArmInt16x8Min:
148 case kArmInt16x8Max: 157 case kArmInt16x8Max:
149 case kArmInt16x8Equal: 158 case kArmInt16x8Equal:
150 case kArmInt16x8NotEqual: 159 case kArmInt16x8NotEqual:
151 case kArmInt16x8GreaterThan: 160 case kArmInt16x8GreaterThan:
152 case kArmInt16x8GreaterThanOrEqual: 161 case kArmInt16x8GreaterThanOrEqual:
162 case kArmUint16x8ShiftRightByScalar:
163 case kArmUint16x8AddSaturate:
164 case kArmUint16x8SubSaturate:
165 case kArmUint16x8Min:
166 case kArmUint16x8Max:
153 case kArmUint16x8GreaterThan: 167 case kArmUint16x8GreaterThan:
154 case kArmUint16x8GreaterThanOrEqual: 168 case kArmUint16x8GreaterThanOrEqual:
155 case kArmInt8x16Splat: 169 case kArmInt8x16Splat:
156 case kArmInt8x16ExtractLane: 170 case kArmInt8x16ExtractLane:
157 case kArmInt8x16ReplaceLane: 171 case kArmInt8x16ReplaceLane:
158 case kArmInt8x16Neg: 172 case kArmInt8x16Neg:
173 case kArmInt8x16ShiftLeftByScalar:
174 case kArmInt8x16ShiftRightByScalar:
159 case kArmInt8x16Add: 175 case kArmInt8x16Add:
176 case kArmInt8x16AddSaturate:
160 case kArmInt8x16Sub: 177 case kArmInt8x16Sub:
178 case kArmInt8x16SubSaturate:
161 case kArmInt8x16Mul: 179 case kArmInt8x16Mul:
162 case kArmInt8x16Min: 180 case kArmInt8x16Min:
163 case kArmInt8x16Max: 181 case kArmInt8x16Max:
164 case kArmInt8x16Equal: 182 case kArmInt8x16Equal:
165 case kArmInt8x16NotEqual: 183 case kArmInt8x16NotEqual:
166 case kArmInt8x16GreaterThan: 184 case kArmInt8x16GreaterThan:
167 case kArmInt8x16GreaterThanOrEqual: 185 case kArmInt8x16GreaterThanOrEqual:
186 case kArmUint8x16ShiftRightByScalar:
187 case kArmUint8x16AddSaturate:
188 case kArmUint8x16SubSaturate:
189 case kArmUint8x16Min:
190 case kArmUint8x16Max:
168 case kArmUint8x16GreaterThan: 191 case kArmUint8x16GreaterThan:
169 case kArmUint8x16GreaterThanOrEqual: 192 case kArmUint8x16GreaterThanOrEqual:
170 return kNoOpcodeFlags; 193 return kNoOpcodeFlags;
171 194
172 case kArmVldrF32: 195 case kArmVldrF32:
173 case kArmVldrF64: 196 case kArmVldrF64:
174 case kArmLdrb: 197 case kArmLdrb:
175 case kArmLdrsb: 198 case kArmLdrsb:
176 case kArmLdrh: 199 case kArmLdrh:
177 case kArmLdrsh: 200 case kArmLdrsh:
(...skipping 22 matching lines...) Expand all
200 223
201 224
202 int InstructionScheduler::GetInstructionLatency(const Instruction* instr) { 225 int InstructionScheduler::GetInstructionLatency(const Instruction* instr) {
203 // TODO(all): Add instruction cost modeling. 226 // TODO(all): Add instruction cost modeling.
204 return 1; 227 return 1;
205 } 228 }
206 229
207 } // namespace compiler 230 } // namespace compiler
208 } // namespace internal 231 } // namespace internal
209 } // namespace v8 232 } // namespace v8
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