Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(1438)

Unified Diff: src/s390/macro-assembler-s390.h

Issue 2662963002: s390: TF Optimize 32-bit Mul/Div/Mod/Popcnt (Closed)
Patch Set: fix dcheck Created 3 years, 11 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « src/s390/disasm-s390.cc ('k') | src/s390/macro-assembler-s390.cc » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: src/s390/macro-assembler-s390.h
diff --git a/src/s390/macro-assembler-s390.h b/src/s390/macro-assembler-s390.h
index 1c86fdd72f22de7c3cca7688a065163c16d5fa26..e19b666cfc4a33efd5c5842e48d6d0661ae96df2 100644
--- a/src/s390/macro-assembler-s390.h
+++ b/src/s390/macro-assembler-s390.h
@@ -325,6 +325,9 @@ class MacroAssembler : public Assembler {
void MulHigh32(Register dst, Register src1, const MemOperand& src2);
void MulHigh32(Register dst, Register src1, Register src2);
void MulHigh32(Register dst, Register src1, const Operand& src2);
+ void MulHighU32(Register dst, Register src1, const MemOperand& src2);
+ void MulHighU32(Register dst, Register src1, Register src2);
+ void MulHighU32(Register dst, Register src1, const Operand& src2);
void Mul32WithOverflowIfCCUnequal(Register dst, Register src1,
const MemOperand& src2);
void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, Register src2);
@@ -336,6 +339,20 @@ class MacroAssembler : public Assembler {
// Divide
void DivP(Register dividend, Register divider);
+ void Div32(Register dst, Register src1, const MemOperand& src2);
+ void Div32(Register dst, Register src1, Register src2);
+ void Div32(Register dst, Register src1, const Operand& src2);
+ void DivU32(Register dst, Register src1, const MemOperand& src2);
+ void DivU32(Register dst, Register src1, Register src2);
+ void DivU32(Register dst, Register src1, const Operand& src2);
+
+ // Mod
+ void Mod32(Register dst, Register src1, const MemOperand& src2);
+ void Mod32(Register dst, Register src1, Register src2);
+ void Mod32(Register dst, Register src1, const Operand& src2);
+ void ModU32(Register dst, Register src1, const MemOperand& src2);
+ void ModU32(Register dst, Register src1, Register src2);
+ void ModU32(Register dst, Register src1, const Operand& src2);
// Square root
void Sqrt(DoubleRegister result, DoubleRegister input);
@@ -372,6 +389,7 @@ class MacroAssembler : public Assembler {
void LoadB(Register dst, const MemOperand& opnd);
void LoadB(Register dst, Register src);
void LoadlB(Register dst, const MemOperand& opnd);
+ void LoadlB(Register dst, Register src);
void LoadLogicalReversedWordP(Register dst, const MemOperand& opnd);
void LoadLogicalReversedHalfWordP(Register dst, const MemOperand& opnd);
« no previous file with comments | « src/s390/disasm-s390.cc ('k') | src/s390/macro-assembler-s390.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698