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Side by Side Diff: src/s390/macro-assembler-s390.h

Issue 2662963002: s390: TF Optimize 32-bit Mul/Div/Mod/Popcnt (Closed)
Patch Set: fix dcheck Created 3 years, 10 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_S390_MACRO_ASSEMBLER_S390_H_ 5 #ifndef V8_S390_MACRO_ASSEMBLER_S390_H_
6 #define V8_S390_MACRO_ASSEMBLER_S390_H_ 6 #define V8_S390_MACRO_ASSEMBLER_S390_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/bailout-reason.h" 9 #include "src/bailout-reason.h"
10 #include "src/frames.h" 10 #include "src/frames.h"
(...skipping 307 matching lines...) Expand 10 before | Expand all | Expand 10 after
318 void MulP(Register dst, const Operand& opnd); 318 void MulP(Register dst, const Operand& opnd);
319 void MulP(Register dst, Register src); 319 void MulP(Register dst, Register src);
320 void MulP(Register dst, const MemOperand& opnd); 320 void MulP(Register dst, const MemOperand& opnd);
321 void Mul(Register dst, Register src1, Register src2); 321 void Mul(Register dst, Register src1, Register src2);
322 void Mul32(Register dst, const MemOperand& src1); 322 void Mul32(Register dst, const MemOperand& src1);
323 void Mul32(Register dst, Register src1); 323 void Mul32(Register dst, Register src1);
324 void Mul32(Register dst, const Operand& src1); 324 void Mul32(Register dst, const Operand& src1);
325 void MulHigh32(Register dst, Register src1, const MemOperand& src2); 325 void MulHigh32(Register dst, Register src1, const MemOperand& src2);
326 void MulHigh32(Register dst, Register src1, Register src2); 326 void MulHigh32(Register dst, Register src1, Register src2);
327 void MulHigh32(Register dst, Register src1, const Operand& src2); 327 void MulHigh32(Register dst, Register src1, const Operand& src2);
328 void MulHighU32(Register dst, Register src1, const MemOperand& src2);
329 void MulHighU32(Register dst, Register src1, Register src2);
330 void MulHighU32(Register dst, Register src1, const Operand& src2);
328 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, 331 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1,
329 const MemOperand& src2); 332 const MemOperand& src2);
330 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, Register src2); 333 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, Register src2);
331 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, 334 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1,
332 const Operand& src2); 335 const Operand& src2);
333 void Mul64(Register dst, const MemOperand& src1); 336 void Mul64(Register dst, const MemOperand& src1);
334 void Mul64(Register dst, Register src1); 337 void Mul64(Register dst, Register src1);
335 void Mul64(Register dst, const Operand& src1); 338 void Mul64(Register dst, const Operand& src1);
336 339
337 // Divide 340 // Divide
338 void DivP(Register dividend, Register divider); 341 void DivP(Register dividend, Register divider);
342 void Div32(Register dst, Register src1, const MemOperand& src2);
343 void Div32(Register dst, Register src1, Register src2);
344 void Div32(Register dst, Register src1, const Operand& src2);
345 void DivU32(Register dst, Register src1, const MemOperand& src2);
346 void DivU32(Register dst, Register src1, Register src2);
347 void DivU32(Register dst, Register src1, const Operand& src2);
348
349 // Mod
350 void Mod32(Register dst, Register src1, const MemOperand& src2);
351 void Mod32(Register dst, Register src1, Register src2);
352 void Mod32(Register dst, Register src1, const Operand& src2);
353 void ModU32(Register dst, Register src1, const MemOperand& src2);
354 void ModU32(Register dst, Register src1, Register src2);
355 void ModU32(Register dst, Register src1, const Operand& src2);
339 356
340 // Square root 357 // Square root
341 void Sqrt(DoubleRegister result, DoubleRegister input); 358 void Sqrt(DoubleRegister result, DoubleRegister input);
342 void Sqrt(DoubleRegister result, const MemOperand& input); 359 void Sqrt(DoubleRegister result, const MemOperand& input);
343 360
344 // Compare 361 // Compare
345 void Cmp32(Register src1, Register src2); 362 void Cmp32(Register src1, Register src2);
346 void CmpP(Register src1, Register src2); 363 void CmpP(Register src1, Register src2);
347 void Cmp32(Register dst, const Operand& opnd); 364 void Cmp32(Register dst, const Operand& opnd);
348 void CmpP(Register dst, const Operand& opnd); 365 void CmpP(Register dst, const Operand& opnd);
(...skipping 16 matching lines...) Expand all
365 void Load(Register dst, const Operand& opnd); 382 void Load(Register dst, const Operand& opnd);
366 void LoadW(Register dst, const MemOperand& opnd, Register scratch = no_reg); 383 void LoadW(Register dst, const MemOperand& opnd, Register scratch = no_reg);
367 void LoadW(Register dst, Register src); 384 void LoadW(Register dst, Register src);
368 void LoadlW(Register dst, const MemOperand& opnd, Register scratch = no_reg); 385 void LoadlW(Register dst, const MemOperand& opnd, Register scratch = no_reg);
369 void LoadlW(Register dst, Register src); 386 void LoadlW(Register dst, Register src);
370 void LoadLogicalHalfWordP(Register dst, const MemOperand& opnd); 387 void LoadLogicalHalfWordP(Register dst, const MemOperand& opnd);
371 void LoadLogicalHalfWordP(Register dst, Register src); 388 void LoadLogicalHalfWordP(Register dst, Register src);
372 void LoadB(Register dst, const MemOperand& opnd); 389 void LoadB(Register dst, const MemOperand& opnd);
373 void LoadB(Register dst, Register src); 390 void LoadB(Register dst, Register src);
374 void LoadlB(Register dst, const MemOperand& opnd); 391 void LoadlB(Register dst, const MemOperand& opnd);
392 void LoadlB(Register dst, Register src);
375 393
376 void LoadLogicalReversedWordP(Register dst, const MemOperand& opnd); 394 void LoadLogicalReversedWordP(Register dst, const MemOperand& opnd);
377 void LoadLogicalReversedHalfWordP(Register dst, const MemOperand& opnd); 395 void LoadLogicalReversedHalfWordP(Register dst, const MemOperand& opnd);
378 396
379 // Load And Test 397 // Load And Test
380 void LoadAndTest32(Register dst, Register src); 398 void LoadAndTest32(Register dst, Register src);
381 void LoadAndTestP_ExtendSrc(Register dst, Register src); 399 void LoadAndTestP_ExtendSrc(Register dst, Register src);
382 void LoadAndTestP(Register dst, Register src); 400 void LoadAndTestP(Register dst, Register src);
383 401
384 void LoadAndTest32(Register dst, const MemOperand& opnd); 402 void LoadAndTest32(Register dst, const MemOperand& opnd);
(...skipping 1450 matching lines...) Expand 10 before | Expand all | Expand 10 after
1835 inline MemOperand NativeContextMemOperand() { 1853 inline MemOperand NativeContextMemOperand() {
1836 return ContextMemOperand(cp, Context::NATIVE_CONTEXT_INDEX); 1854 return ContextMemOperand(cp, Context::NATIVE_CONTEXT_INDEX);
1837 } 1855 }
1838 1856
1839 #define ACCESS_MASM(masm) masm-> 1857 #define ACCESS_MASM(masm) masm->
1840 1858
1841 } // namespace internal 1859 } // namespace internal
1842 } // namespace v8 1860 } // namespace v8
1843 1861
1844 #endif // V8_S390_MACRO_ASSEMBLER_S390_H_ 1862 #endif // V8_S390_MACRO_ASSEMBLER_S390_H_
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