Enables many language tests for arm64.

runtime/vm/constants_arm64.h

Index: runtime/vm/constants_arm64.h
===================================================================
--- runtime/vm/constants_arm64.h	(revision 35723)
+++ runtime/vm/constants_arm64.h	(working copy)
@@ -97,12 +97,11 @@
 };
 
 // Register alias for floating point scratch register.
-const VRegister VTMP0 = V30;
-const VRegister VTMP1 = V31;
+const VRegister VTMP = V31;
 
 // Architecture independent aliases.
 typedef VRegister FpuRegister;
-const FpuRegister FpuTMP = VTMP0;
+const FpuRegister FpuTMP = VTMP;
 const int kNumberOfFpuRegisters = kNumberOfVRegisters;
 const FpuRegister kNoFpuRegister = kNoVRegister;
 
@@ -403,6 +402,8 @@
   MiscDP3SourceMask = 0x1f000000,
   MiscDP3SourceFixed = DPRegisterFixed | B28 | B24,
   MADD = MiscDP3SourceFixed,
+  MSUB = MiscDP3SourceFixed | B15,
+  SMULH = MiscDP3SourceFixed | B31 | B22,
 };
 
 // C3.5.10
@@ -419,6 +420,13 @@
   BICS = LogicalShiftFixed | B30 | B29 | B21,
 };
 
+// C3.6.25
+enum FPOneSourceOp {
+  FPOneSourceMask = 0x5f207c00,
+  FPOneSourceFixed = FPFixed | B21 | B14,
+  FMOVDD = FPOneSourceFixed | B22,
+};
+
 // C3.6.28
 enum FPImmOp {
   FPImmMask = 0x5f201c00,
@@ -462,6 +470,7 @@
 _V(MiscDP2Source)                                                              \
 _V(MiscDP3Source)                                                              \
 _V(LogicalShift)                                                               \
+_V(FPOneSource)                                                                \
 _V(FPImm)                                                                      \
 _V(FPIntCvt)                                                                   \