[Atomics] Make Atomics.exchange a builtin using TF

src/x64/assembler-x64.cc

Index: src/x64/assembler-x64.cc
diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc
index 8f8ed7b93f5d0444d42ce3e3646ea40c78e5f4a1..9625401b6fe343e73c048b0422b13e0c07555514 100644
--- a/src/x64/assembler-x64.cc
+++ b/src/x64/assembler-x64.cc
@@ -1979,7 +1979,7 @@ void Assembler::shrd(Register dst, Register src) {
   emit_modrm(src, dst);
 }
 
-void Assembler::xchgb(Register reg, const Operand& op) {
+void Assembler::xchgb(Register reg, const Operand& op, bool is_signed) {
   EnsureSpace ensure_space(this);
   if (!reg.is_byte_register()) {
     // Register is not one of al, bl, cl, dl.  Its encoding needs REX.
@@ -1989,14 +1989,24 @@ void Assembler::xchgb(Register reg, const Operand& op) {
   }
   emit(0x86);
   emit_operand(reg, op);
+  if (is_signed) {

[binji, 2017/01/17 21:45:50]

This is the wrong place to put this code; the assembler is meant to map
more-or-less directly to instructions.

[aseemgarg, 2017/01/21 08:40:37]

Removed. Moved the move part upstream in code-generator-x64 instead.

+    movsxbl(reg, reg);
+  } else {
+    movzxbl(reg, reg);
+  }
 }
 
-void Assembler::xchgw(Register reg, const Operand& op) {
+void Assembler::xchgw(Register reg, const Operand& op, bool is_signed) {
   EnsureSpace ensure_space(this);
   emit(0x66);
   emit_optional_rex_32(reg, op);
   emit(0x87);
   emit_operand(reg, op);
+  if (is_signed) {
+    movsxwl(reg, reg);
+  } else {
+    movzxwl(reg, reg);
+  }
 }
 
 void Assembler::emit_xchg(Register dst, Register src, int size) {