[Atomics] Make Atomics.exchange a builtin using TF

src/x64/assembler-x64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/x64/assembler-x64.h"
 
 #include <cstring>
 
 #if V8_TARGET_ARCH_X64
 
@@ skipping 1961 matching lines @@
 
 
 void Assembler::shrd(Register dst, Register src) {
   EnsureSpace ensure_space(this);
   emit_rex_64(src, dst);
   emit(0x0F);
   emit(0xAD);
   emit_modrm(src, dst);
 }
 
-void Assembler::xchgb(Register reg, const Operand& op) {
+void Assembler::xchgb(Register reg, const Operand& op, bool is_signed) {
   EnsureSpace ensure_space(this);
   if (!reg.is_byte_register()) {
     // Register is not one of al, bl, cl, dl.  Its encoding needs REX.
     emit_rex_32(reg, op);
   } else {
     emit_optional_rex_32(reg, op);
   }
   emit(0x86);
   emit_operand(reg, op);
+  if (is_signed) {

[binji, 2017/01/17 21:45:50]

This is the wrong place to put this code; the assembler is meant to map
more-or-less directly to instructions.

[aseemgarg, 2017/01/21 08:40:37]

Removed. Moved the move part upstream in code-generator-x64 instead.

+    movsxbl(reg, reg);
+  } else {
+    movzxbl(reg, reg);
+  }
 }
 
-void Assembler::xchgw(Register reg, const Operand& op) {
+void Assembler::xchgw(Register reg, const Operand& op, bool is_signed) {
   EnsureSpace ensure_space(this);
   emit(0x66);
   emit_optional_rex_32(reg, op);
   emit(0x87);
   emit_operand(reg, op);
+  if (is_signed) {
+    movsxwl(reg, reg);
+  } else {
+    movzxwl(reg, reg);
+  }
 }
 
 void Assembler::emit_xchg(Register dst, Register src, int size) {
   EnsureSpace ensure_space(this);
   if (src.is(rax) || dst.is(rax)) {  // Single-byte encoding
     Register other = src.is(rax) ? dst : src;
     emit_rex(other, size);
     emit(0x90 | other.low_bits());
   } else if (dst.low_bits() == 4) {
     emit_rex(dst, src, size);
@@ skipping 2752 matching lines @@
 
 bool RelocInfo::IsInConstantPool() {
   return false;
 }
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_X64