ARM64: Add NEON support

src/arm64/deoptimizer-arm64.cc

Index: src/arm64/deoptimizer-arm64.cc
diff --git a/src/arm64/deoptimizer-arm64.cc b/src/arm64/deoptimizer-arm64.cc
index c1d04ac3fb2c26d45a55d5280f83f3d3b4a634de..699ab80062a8238726e8f3f70225299a842bf5bc 100644
--- a/src/arm64/deoptimizer-arm64.cc
+++ b/src/arm64/deoptimizer-arm64.cc
@@ -96,7 +96,7 @@ void Deoptimizer::TableEntryGenerator::Generate() {
 
   // Save all allocatable floating point registers.
   CPURegList saved_fp_registers(
-      CPURegister::kFPRegister, kDRegSizeInBits,
+      CPURegister::kVRegister, kDRegSizeInBits,
       RegisterConfiguration::Crankshaft()->allocatable_double_codes_mask());
   __ PushCPURegList(saved_fp_registers);
 
@@ -113,7 +113,7 @@ void Deoptimizer::TableEntryGenerator::Generate() {
       (saved_fp_registers.Count() * kDRegSize);
 
   // Floating point registers are saved on the stack above core registers.
-  const int kFPRegistersOffset = saved_registers.Count() * kXRegSize;
+  const int kVRegistersOffset = saved_registers.Count() * kXRegSize;
 
   // Get the bailout id from the stack.
   Register bailout_id = x2;
@@ -168,7 +168,7 @@ void Deoptimizer::TableEntryGenerator::Generate() {
   // Copy FP registers to the input frame.
   CPURegList copy_fp_to_input = saved_fp_registers;
   for (int i = 0; i < saved_fp_registers.Count(); i++) {
-    int src_offset = kFPRegistersOffset + (i * kDoubleSize);
+    int src_offset = kVRegistersOffset + (i * kDoubleSize);
     __ Peek(x2, src_offset);
     CPURegister reg = copy_fp_to_input.PopLowestIndex();
     int dst_offset = FrameDescription::double_registers_offset() +