[ARM] Add vand, vorr NEON instructions.

test/cctest/test-assembler-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1266 matching lines @@
     uint32_t vmov_from_scalar_s16, vmov_from_scalar_u16;
     uint32_t vmov_from_scalar_32;
     uint32_t vmov[4], vmvn[4];
     int32_t vcvt_s32_f32[4];
     uint32_t vcvt_u32_f32[4];
     float vcvt_f32_s32[4], vcvt_f32_u32[4];
     uint32_t vdup8[4], vdup16[4], vdup32[4];
     float vabsf[4], vnegf[4];
     uint32_t vabs_s8[4], vabs_s16[4], vabs_s32[4];
     uint32_t vneg_s8[4], vneg_s16[4], vneg_s32[4];
-    uint32_t veor[4];
+    uint32_t veor[4], vand[4], vorr[4];
     float vdupf[4], vaddf[4], vsubf[4], vmulf[4];
     uint32_t vadd8[4], vadd16[4], vadd32[4];
     uint32_t vsub8[4], vsub16[4], vsub32[4];
     uint32_t vmul8[4], vmul16[4], vmul32[4];
     uint32_t vceq[4], vceqf[4], vcgef[4], vcgtf[4];
     uint32_t vcge_s8[4], vcge_u16[4], vcge_s32[4];
     uint32_t vcgt_s8[4], vcgt_u16[4], vcgt_s32[4];
     float vrecpe[4], vrecps[4], vrsqrte[4], vrsqrts[4];
     uint32_t vtst[4], vbsl[4];
     uint32_t vext[4];
@@ skipping 151 matching lines @@
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vneg_s8))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     __ vneg(Neon16, q1, q0);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vneg_s16))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     __ vneg(Neon32, q1, q0);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vneg_s32))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
 
     // veor.
-    __ mov(r4, Operand(0x00aa));
+    __ mov(r4, Operand(0xaa));
     __ vdup(Neon16, q0, r4);
-    __ mov(r4, Operand(0x0055));
+    __ mov(r4, Operand(0x55));
     __ vdup(Neon16, q1, r4);
     __ veor(q1, q1, q0);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, veor))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
+    // vand.
+    __ mov(r4, Operand(0xff));
+    __ vdup(Neon16, q0, r4);
+    __ mov(r4, Operand(0xfe));
+    __ vdup(Neon16, q1, r4);
+    __ vand(q1, q1, q0);
+    __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vand))));
+    __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
+    // vorr.
+    __ mov(r4, Operand(0xaa));
+    __ vdup(Neon16, q0, r4);
+    __ mov(r4, Operand(0x55));
+    __ vdup(Neon16, q1, r4);
+    __ vorr(q1, q1, q0);
+    __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vorr))));
+    __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
 
     // vadd (float).
     __ vmov(s4, 1.0);
     __ vdup(q0, s4);
     __ vdup(q1, s4);
     __ vadd(q1, q1, q0);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vaddf))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     // vsub (float).
     __ vmov(s4, 2.0);
@@ skipping 336 matching lines @@
     CHECK_EQ_32X4(vnegf, 1.0, 0.0, -0.0, -1.0);
     // src: [0x7f7f7f7f, 0x01010101, 0xffffffff, 0x80808080]
     CHECK_EQ_32X4(vabs_s8, 0x7f7f7f7fu, 0x01010101u, 0x01010101u, 0x80808080u);
     CHECK_EQ_32X4(vabs_s16, 0x7f7f7f7fu, 0x01010101u, 0x00010001u, 0x7f807f80u);
     CHECK_EQ_32X4(vabs_s32, 0x7f7f7f7fu, 0x01010101u, 0x00000001u, 0x7f7f7f80u);
     CHECK_EQ_32X4(vneg_s8, 0x81818181u, 0xffffffffu, 0x01010101u, 0x80808080u);
     CHECK_EQ_32X4(vneg_s16, 0x80818081u, 0xfefffeffu, 0x00010001u, 0x7f807f80u);
     CHECK_EQ_32X4(vneg_s32, 0x80808081u, 0xfefefeffu, 0x00000001u, 0x7f7f7f80u);
 
     CHECK_EQ_SPLAT(veor, 0x00ff00ffu);
+    CHECK_EQ_SPLAT(vand, 0x00fe00feu);
+    CHECK_EQ_SPLAT(vorr, 0x00ff00ffu);
     CHECK_EQ_SPLAT(vaddf, 2.0);
     CHECK_EQ_SPLAT(vsubf, -1.0);
     CHECK_EQ_SPLAT(vmulf, 4.0);
     CHECK_EQ_SPLAT(vrecpe, 0.5f);    // 1 / 2
     CHECK_EQ_SPLAT(vrecps, -1.0f);   // 2 - (2 * 1.5)
     CHECK_EQ_SPLAT(vrsqrte, 0.5f);   // 1 / sqrt(4)
     CHECK_EQ_SPLAT(vrsqrts, -1.0f);  // (3 - (2 * 2.5)) / 2
     CHECK_EQ_SPLAT(vceqf, 0xffffffffu);
     // [0] >= [-1, 1, -0, 0]
     CHECK_EQ_32X4(vcgef, 0u, 0xffffffffu, 0xffffffffu, 0xffffffffu);
@@ skipping 1719 matching lines @@
   HandleScope scope(isolate);
 
   Assembler assm(isolate, NULL, 0);
   __ mov(r0, Operand(isolate->factory()->infinity_value()));
   __ BlockConstPoolFor(1019);
   for (int i = 0; i < 1019; ++i) __ nop();
   __ vldr(d0, MemOperand(r0, 0));
 }
 
 #undef __