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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <stdarg.h> | 5 #include <stdarg.h> |
6 #include <stdlib.h> | 6 #include <stdlib.h> |
7 #include <cmath> | 7 #include <cmath> |
8 | 8 |
9 #if V8_TARGET_ARCH_ARM | 9 #if V8_TARGET_ARCH_ARM |
10 | 10 |
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3825 } else { | 3825 } else { |
3826 UNIMPLEMENTED(); // Not used by V8. | 3826 UNIMPLEMENTED(); // Not used by V8. |
3827 } | 3827 } |
3828 } | 3828 } |
3829 | 3829 |
3830 void Simulator::DecodeSpecialCondition(Instruction* instr) { | 3830 void Simulator::DecodeSpecialCondition(Instruction* instr) { |
3831 switch (instr->SpecialValue()) { | 3831 switch (instr->SpecialValue()) { |
3832 case 4: | 3832 case 4: |
3833 if (instr->Bits(21, 20) == 2 && instr->Bits(11, 8) == 1 && | 3833 if (instr->Bits(21, 20) == 2 && instr->Bits(11, 8) == 1 && |
3834 instr->Bit(4) == 1) { | 3834 instr->Bit(4) == 1) { |
3835 // vmov Qd, Qm | 3835 // vmov Qd, Qm. |
| 3836 // vorr, Qd, Qm, Qn. |
3836 int Vd = instr->VFPDRegValue(kSimd128Precision); | 3837 int Vd = instr->VFPDRegValue(kSimd128Precision); |
3837 int Vm = instr->VFPMRegValue(kSimd128Precision); | 3838 int Vm = instr->VFPMRegValue(kSimd128Precision); |
3838 uint32_t data[4]; | 3839 int Vn = instr->VFPNRegValue(kSimd128Precision); |
3839 get_q_register(Vm, data); | 3840 uint32_t src1[4]; |
3840 set_q_register(Vd, data); | 3841 get_q_register(Vm, src1); |
| 3842 if (Vm != Vn) { |
| 3843 uint32_t src2[4]; |
| 3844 get_q_register(Vn, src2); |
| 3845 for (int i = 0; i < 4; i++) { |
| 3846 src1[i] = src1[i] | src2[i]; |
| 3847 } |
| 3848 } |
| 3849 set_q_register(Vd, src1); |
3841 } else if (instr->Bits(11, 8) == 8) { | 3850 } else if (instr->Bits(11, 8) == 8) { |
3842 // vadd/vtst | 3851 // vadd/vtst |
3843 NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20)); | 3852 NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20)); |
3844 int Vd = instr->VFPDRegValue(kSimd128Precision); | 3853 int Vd = instr->VFPDRegValue(kSimd128Precision); |
3845 int Vm = instr->VFPMRegValue(kSimd128Precision); | 3854 int Vm = instr->VFPMRegValue(kSimd128Precision); |
3846 int Vn = instr->VFPNRegValue(kSimd128Precision); | 3855 int Vn = instr->VFPNRegValue(kSimd128Precision); |
3847 if (instr->Bit(4) == 0) { | 3856 if (instr->Bit(4) == 0) { |
3848 // vadd.i<size> Qd, Qm, Qn. | 3857 // vadd.i<size> Qd, Qm, Qn. |
3849 switch (size) { | 3858 switch (size) { |
3850 case Neon8: { | 3859 case Neon8: { |
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3986 int Vm = instr->VFPMRegValue(kSimd128Precision); | 3995 int Vm = instr->VFPMRegValue(kSimd128Precision); |
3987 int Vn = instr->VFPNRegValue(kSimd128Precision); | 3996 int Vn = instr->VFPNRegValue(kSimd128Precision); |
3988 float src1[4], src2[4]; | 3997 float src1[4], src2[4]; |
3989 get_q_register(Vn, src1); | 3998 get_q_register(Vn, src1); |
3990 get_q_register(Vm, src2); | 3999 get_q_register(Vm, src2); |
3991 uint32_t dst[4]; | 4000 uint32_t dst[4]; |
3992 for (int i = 0; i < 4; i++) { | 4001 for (int i = 0; i < 4; i++) { |
3993 dst[i] = (src1[i] == src2[i]) ? 0xFFFFFFFF : 0; | 4002 dst[i] = (src1[i] == src2[i]) ? 0xFFFFFFFF : 0; |
3994 } | 4003 } |
3995 set_q_register(Vd, dst); | 4004 set_q_register(Vd, dst); |
| 4005 } else if (instr->Bits(11, 8) == 1 && instr->Bits(21, 20) == 0 && |
| 4006 instr->Bit(6) == 1 && instr->Bit(4) == 1) { |
| 4007 int Vd = instr->VFPDRegValue(kSimd128Precision); |
| 4008 int Vm = instr->VFPMRegValue(kSimd128Precision); |
| 4009 int Vn = instr->VFPNRegValue(kSimd128Precision); |
| 4010 // vand Qd, Qm, Qn. |
| 4011 uint32_t src1[4], src2[4]; |
| 4012 get_q_register(Vn, src1); |
| 4013 get_q_register(Vm, src2); |
| 4014 for (int i = 0; i < 4; i++) { |
| 4015 src1[i] = src1[i] & src2[i]; |
| 4016 } |
| 4017 set_q_register(Vd, src1); |
3996 } else if (instr->Bits(11, 8) == 0x3) { | 4018 } else if (instr->Bits(11, 8) == 0x3) { |
3997 // vcge/vcgt.s<size> Qd, Qm, Qn. | 4019 // vcge/vcgt.s<size> Qd, Qm, Qn. |
3998 bool ge = instr->Bit(4) == 1; | 4020 bool ge = instr->Bit(4) == 1; |
3999 NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20)); | 4021 NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20)); |
4000 int Vd = instr->VFPDRegValue(kSimd128Precision); | 4022 int Vd = instr->VFPDRegValue(kSimd128Precision); |
4001 int Vm = instr->VFPMRegValue(kSimd128Precision); | 4023 int Vm = instr->VFPMRegValue(kSimd128Precision); |
4002 int Vn = instr->VFPNRegValue(kSimd128Precision); | 4024 int Vn = instr->VFPNRegValue(kSimd128Precision); |
4003 switch (size) { | 4025 switch (size) { |
4004 case Neon8: { | 4026 case Neon8: { |
4005 int8_t src1[16], src2[16]; | 4027 int8_t src1[16], src2[16]; |
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5206 set_register(sp, current_sp + sizeof(uintptr_t)); | 5228 set_register(sp, current_sp + sizeof(uintptr_t)); |
5207 return address; | 5229 return address; |
5208 } | 5230 } |
5209 | 5231 |
5210 } // namespace internal | 5232 } // namespace internal |
5211 } // namespace v8 | 5233 } // namespace v8 |
5212 | 5234 |
5213 #endif // USE_SIMULATOR | 5235 #endif // USE_SIMULATOR |
5214 | 5236 |
5215 #endif // V8_TARGET_ARCH_ARM | 5237 #endif // V8_TARGET_ARCH_ARM |
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