[ARM] Add vand, vorr NEON instructions.

src/arm/simulator-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <stdarg.h>
 #include <stdlib.h>
 #include <cmath>
 
 #if V8_TARGET_ARCH_ARM
 
@@ skipping 3814 matching lines @@
   } else {
     UNIMPLEMENTED();  // Not used by V8.
   }
 }
 
 void Simulator::DecodeSpecialCondition(Instruction* instr) {
   switch (instr->SpecialValue()) {
     case 4:
       if (instr->Bits(21, 20) == 2 && instr->Bits(11, 8) == 1 &&
           instr->Bit(4) == 1) {
-        // vmov Qd, Qm
+        // vmov Qd, Qm.
+        // vorr, Qd, Qm, Qn.
         int Vd = instr->VFPDRegValue(kSimd128Precision);
         int Vm = instr->VFPMRegValue(kSimd128Precision);
-        uint32_t data[4];
-        get_q_register(Vm, data);
-        set_q_register(Vd, data);
+        int Vn = instr->VFPNRegValue(kSimd128Precision);
+        uint32_t src1[4];
+        get_q_register(Vm, src1);
+        if (Vm != Vn) {
+          uint32_t src2[4];
+          get_q_register(Vn, src2);
+          for (int i = 0; i < 4; i++) {
+            src1[i] = src1[i] | src2[i];
+          }
+        }
+        set_q_register(Vd, src1);
       } else if (instr->Bits(11, 8) == 8) {
         // vadd/vtst
         int size = static_cast<NeonSize>(instr->Bits(21, 20));
         int Vd = instr->VFPDRegValue(kSimd128Precision);
         int Vm = instr->VFPMRegValue(kSimd128Precision);
         int Vn = instr->VFPNRegValue(kSimd128Precision);
         if (instr->Bit(4) == 0) {
           // vadd.i<size> Qd, Qm, Qn.
           switch (size) {
             case Neon8: {
@@ skipping 135 matching lines @@
         int Vm = instr->VFPMRegValue(kSimd128Precision);
         int Vn = instr->VFPNRegValue(kSimd128Precision);
         float src1[4], src2[4];
         get_q_register(Vn, src1);
         get_q_register(Vm, src2);
         uint32_t dst[4];
         for (int i = 0; i < 4; i++) {
           dst[i] = (src1[i] == src2[i]) ? 0xFFFFFFFF : 0;
         }
         set_q_register(Vd, dst);
+      } else if (instr->Bits(11, 8) == 1 && instr->Bits(21, 20) == 0 &&
+                 instr->Bit(6) == 1 && instr->Bit(4) == 1) {
+        int Vd = instr->VFPDRegValue(kSimd128Precision);
+        int Vm = instr->VFPMRegValue(kSimd128Precision);
+        int Vn = instr->VFPNRegValue(kSimd128Precision);
+        // vand Qd, Qm, Qn.
+        uint32_t src1[4], src2[4];
+        get_q_register(Vn, src1);
+        get_q_register(Vm, src2);
+        for (int i = 0; i < 4; i++) {
+          src1[i] = src1[i] & src2[i];
+        }
+        set_q_register(Vd, src1);
       } else if (instr->Bit(20) == 0 && instr->Bits(11, 8) == 0xf &&
                  instr->Bit(6) == 1 && instr->Bit(4) == 1) {
         int Vd = instr->VFPDRegValue(kSimd128Precision);
         int Vm = instr->VFPMRegValue(kSimd128Precision);
         int Vn = instr->VFPNRegValue(kSimd128Precision);
         float src1[4], src2[4];
         get_q_register(Vn, src1);
         get_q_register(Vm, src2);
         if (instr->Bit(21) == 0) {
           // vrecps.f32 Qd, Qm, Qn.
@@ skipping 1079 matching lines @@
   set_register(sp, current_sp + sizeof(uintptr_t));
   return address;
 }
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // USE_SIMULATOR
 
 #endif  // V8_TARGET_ARCH_ARM