Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(129)

Issues Search
    My Issues | Starred     Open | Closed | All

Unified Diff: src/mips/assembler-mips.h

Issue 2591063003: MIPS: Fix improper use of odd FP reg on mips32r6 (Closed)
Patch Set: Created 4 years ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « no previous file | test/cctest/test-macro-assembler-mips.cc » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: src/mips/assembler-mips.h
diff --git a/src/mips/assembler-mips.h b/src/mips/assembler-mips.h
index 1b93829682371ea5b746e37c064ca71ea7407100..053b85b8c46f56676b3e53d5ab3b1c2168cd6316 100644
--- a/src/mips/assembler-mips.h
+++ b/src/mips/assembler-mips.h
@@ -68,7 +68,7 @@ namespace internal {
#define ALLOCATABLE_DOUBLE_REGISTERS(V) \
V(f0) V(f2) V(f4) V(f6) V(f8) V(f10) V(f12) V(f14) \
- V(f16) V(f18) V(f20) V(f22) V(f24) V(f26)
+ V(f16) V(f18) V(f20) V(f22) V(f24)
// clang-format on
// CPU Registers.
@@ -282,8 +282,7 @@ const DoubleRegister f31 = {31};
#define kLithiumScratchDouble f30
#define kDoubleRegZero f28
// Used on mips32r6 for compare operations.
-// We use the last non-callee saved odd register for O32 ABI
-#define kDoubleCompareReg f19
+#define kDoubleCompareReg f26
// FPU (coprocessor 1) control registers.
// Currently only FCSR (#31) is implemented.
« no previous file with comments | « no previous file | test/cctest/test-macro-assembler-mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698