For ARMv6, works around missing instructions.

runtime/vm/intermediate_language_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/intermediate_language.h"
 
+#include "vm/cpu.h"
 #include "vm/dart_entry.h"
 #include "vm/flow_graph_compiler.h"
 #include "vm/locations.h"
 #include "vm/object_store.h"
 #include "vm/parser.h"
 #include "vm/simulator.h"
 #include "vm/stack_frame.h"
 #include "vm/stub_code.h"
 #include "vm/symbols.h"
 
@@ skipping 2860 matching lines @@
     summary->AddTemp(Location::RequiresFpuRegister());
     summary->set_out(0, Location::RequiresRegister());
     return summary;
   }
   summary->set_in(0, Location::RequiresRegister());
   summary->set_in(1, Location::RegisterOrSmiConstant(right()));
   if (((op_kind() == Token::kSHL) && !is_truncating()) ||
       (op_kind() == Token::kSHR)) {
     summary->AddTemp(Location::RequiresRegister());
   }
+  if (op_kind() == Token::kMUL) {
+    if (TargetCPUFeatures::arm_version() != ARMv7) {
+      summary->AddTemp(Location::RequiresFpuRegister());
+    }
+  }
   // We make use of 3-operand instructions by not requiring result register
   // to be identical to first input register as on Intel.
   summary->set_out(0, Location::RequiresRegister());
   return summary;
 }
 
 
 void BinarySmiOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   if (op_kind() == Token::kSHL) {
     EmitSmiShiftLeft(compiler, this);
@@ skipping 33 matching lines @@
           if (value == 2) {
             __ mov(result, ShifterOperand(left, LSL, 1));
           } else {
             __ LoadImmediate(IP, value);
             __ mul(result, left, IP);
           }
         } else {
           if (value == 2) {
             __ mov(IP, ShifterOperand(left, ASR, 31));  // IP = sign of left.
             __ mov(result, ShifterOperand(left, LSL, 1));
+            // IP: result bits 32..63.
+            __ cmp(IP, ShifterOperand(result, ASR, 31));
+            __ b(deopt, NE);
           } else {
-            __ LoadImmediate(IP, value);
-            __ smull(result, IP, left, IP);
+            if (TargetCPUFeatures::arm_version() == ARMv7) {
+              __ LoadImmediate(IP, value);
+              __ smull(result, IP, left, IP);
+              // IP: result bits 32..63.
+              __ cmp(IP, ShifterOperand(result, ASR, 31));
+              __ b(deopt, NE);
+            } else {
+              const QRegister qtmp = locs()->temp(0).fpu_reg();
+              const DRegister dtmp0 = EvenDRegisterOf(qtmp);
+              const DRegister dtmp1 = OddDRegisterOf(qtmp);
+              __ LoadImmediate(IP, value);
+              __ CheckMultSignedOverflow(left, IP, result, dtmp0, dtmp1, deopt);
+              __ mul(result, left, IP);
+            }
           }
-          // IP: result bits 32..63.
-          __ cmp(IP, ShifterOperand(result, ASR, 31));
-          __ b(deopt, NE);
         }
         break;
       }
       case Token::kTRUNCDIV: {
         const intptr_t value = Smi::Cast(constant).Value();
         if (value == 1) {
           __ MoveRegister(result, left);
           break;
         } else if (value == -1) {
           // Check the corner case of dividing the 'MIN_SMI' with -1, in which
@@ skipping 103 matching lines @@
         __ subs(result, left, ShifterOperand(right));
         __ b(deopt, VS);
       }
       break;
     }
     case Token::kMUL: {
       __ Asr(IP, left, kSmiTagSize);  // SmiUntag left into IP.
       if (deopt == NULL) {
         __ mul(result, IP, right);
       } else {
-        __ smull(result, IP, IP, right);
-        // IP: result bits 32..63.
-        __ cmp(IP, ShifterOperand(result, ASR, 31));
-        __ b(deopt, NE);
+        if (TargetCPUFeatures::arm_version() == ARMv7) {
+          __ smull(result, IP, IP, right);
+          // IP: result bits 32..63.
+          __ cmp(IP, ShifterOperand(result, ASR, 31));
+          __ b(deopt, NE);
+        } else {
+          const QRegister qtmp = locs()->temp(0).fpu_reg();
+          const DRegister dtmp0 = EvenDRegisterOf(qtmp);
+          const DRegister dtmp1 = OddDRegisterOf(qtmp);
+          __ CheckMultSignedOverflow(IP, right, result, dtmp0, dtmp1, deopt);
+          __ mul(result, IP, right);
+        }
       }
       break;
     }
     case Token::kBIT_AND: {
       // No overflow check.
       __ and_(result, left, ShifterOperand(right));
       break;
     }
     case Token::kBIT_OR: {
       // No overflow check.
@@ skipping 2934 matching lines @@
   compiler->GenerateCall(token_pos(),
                          &label,
                          PcDescriptors::kOther,
                          locs());
   __ Drop(ArgumentCount());  // Discard arguments.
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM