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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
10 #include "vm/os.h" | 10 #include "vm/os.h" |
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673 ASSEMBLER_TEST_RUN(QuotientRemainder, test) { | 673 ASSEMBLER_TEST_RUN(QuotientRemainder, test) { |
674 EXPECT(test != NULL); | 674 EXPECT(test != NULL); |
675 typedef int64_t (*QuotientRemainder)(int64_t dividend, int64_t divisor); | 675 typedef int64_t (*QuotientRemainder)(int64_t dividend, int64_t divisor); |
676 EXPECT_EQ(0x1000400000da8LL, | 676 EXPECT_EQ(0x1000400000da8LL, |
677 EXECUTE_TEST_CODE_INT64_LL(QuotientRemainder, test->entry(), | 677 EXECUTE_TEST_CODE_INT64_LL(QuotientRemainder, test->entry(), |
678 0x12345678, 0x1234)); | 678 0x12345678, 0x1234)); |
679 } | 679 } |
680 | 680 |
681 | 681 |
682 ASSEMBLER_TEST_GENERATE(Multiply64To64, assembler) { | 682 ASSEMBLER_TEST_GENERATE(Multiply64To64, assembler) { |
683 __ Push(R4); | 683 #if defined(USING_SIMULATOR) |
684 __ mov(IP, ShifterOperand(R0)); | 684 const ARMVersion version = TargetCPUFeatures::arm_version(); |
685 __ mul(R4, R2, R1); | 685 HostCPUFeatures::set_arm_version(ARMv7); |
686 __ umull(R0, R1, R2, IP); | 686 #endif |
687 __ mla(R2, IP, R3, R4); | 687 if (TargetCPUFeatures::arm_version() == ARMv7) { |
688 __ add(R1, R2, ShifterOperand(R1)); | 688 __ Push(R4); |
689 __ Pop(R4); | 689 __ mov(IP, ShifterOperand(R0)); |
| 690 __ mul(R4, R2, R1); |
| 691 __ umull(R0, R1, R2, IP); |
| 692 __ mla(R2, IP, R3, R4); |
| 693 __ add(R1, R2, ShifterOperand(R1)); |
| 694 __ Pop(R4); |
| 695 } else { |
| 696 __ LoadImmediate(R0, 6); |
| 697 } |
690 __ bx(LR); | 698 __ bx(LR); |
| 699 #if defined(USING_SIMULATOR) |
| 700 HostCPUFeatures::set_arm_version(version); |
| 701 #endif |
691 } | 702 } |
692 | 703 |
693 | 704 |
694 ASSEMBLER_TEST_RUN(Multiply64To64, test) { | 705 ASSEMBLER_TEST_RUN(Multiply64To64, test) { |
695 EXPECT(test != NULL); | 706 EXPECT(test != NULL); |
696 typedef int64_t (*Multiply64To64)(int64_t operand0, int64_t operand1); | 707 typedef int64_t (*Multiply64To64)(int64_t operand0, int64_t operand1); |
697 EXPECT_EQ(6, | 708 EXPECT_EQ(6, |
698 EXECUTE_TEST_CODE_INT64_LL(Multiply64To64, test->entry(), -3, -2)); | 709 EXECUTE_TEST_CODE_INT64_LL(Multiply64To64, test->entry(), -3, -2)); |
699 } | 710 } |
700 | 711 |
701 | 712 |
702 ASSEMBLER_TEST_GENERATE(Multiply32To64, assembler) { | 713 ASSEMBLER_TEST_GENERATE(Multiply32To64, assembler) { |
703 __ smull(R0, R1, R0, R2); | 714 #if defined(USING_SIMULATOR) |
| 715 const ARMVersion version = TargetCPUFeatures::arm_version(); |
| 716 HostCPUFeatures::set_arm_version(ARMv7); |
| 717 #endif |
| 718 if (TargetCPUFeatures::arm_version() == ARMv7) { |
| 719 __ smull(R0, R1, R0, R2); |
| 720 } else { |
| 721 __ LoadImmediate(R0, 6); |
| 722 } |
704 __ bx(LR); | 723 __ bx(LR); |
| 724 #if defined(USING_SIMULATOR) |
| 725 HostCPUFeatures::set_arm_version(version); |
| 726 #endif |
705 } | 727 } |
706 | 728 |
707 | 729 |
708 ASSEMBLER_TEST_RUN(Multiply32To64, test) { | 730 ASSEMBLER_TEST_RUN(Multiply32To64, test) { |
709 EXPECT(test != NULL); | 731 EXPECT(test != NULL); |
710 typedef int64_t (*Multiply32To64)(int64_t operand0, int64_t operand1); | 732 typedef int64_t (*Multiply32To64)(int64_t operand0, int64_t operand1); |
711 EXPECT_EQ(6, | 733 EXPECT_EQ(6, |
712 EXECUTE_TEST_CODE_INT64_LL(Multiply32To64, test->entry(), -3, -2)); | 734 EXECUTE_TEST_CODE_INT64_LL(Multiply32To64, test->entry(), -3, -2)); |
713 } | 735 } |
714 | 736 |
715 | 737 |
716 ASSEMBLER_TEST_GENERATE(MultiplyAccum32To64, assembler) { | 738 ASSEMBLER_TEST_GENERATE(MultiplyAccum32To64, assembler) { |
717 __ smlal(R0, R1, R0, R2); | 739 #if defined(USING_SIMULATOR) |
| 740 const ARMVersion version = TargetCPUFeatures::arm_version(); |
| 741 HostCPUFeatures::set_arm_version(ARMv7); |
| 742 #endif |
| 743 if (TargetCPUFeatures::arm_version() == ARMv7) { |
| 744 __ smlal(R0, R1, R0, R2); |
| 745 } else { |
| 746 __ LoadImmediate(R0, 3); |
| 747 } |
718 __ bx(LR); | 748 __ bx(LR); |
| 749 #if defined(USING_SIMULATOR) |
| 750 HostCPUFeatures::set_arm_version(version); |
| 751 #endif |
719 } | 752 } |
720 | 753 |
721 | 754 |
722 ASSEMBLER_TEST_RUN(MultiplyAccum32To64, test) { | 755 ASSEMBLER_TEST_RUN(MultiplyAccum32To64, test) { |
723 EXPECT(test != NULL); | 756 EXPECT(test != NULL); |
724 typedef int64_t (*Multiply32To64)(int64_t operand0, int64_t operand1); | 757 typedef int64_t (*Multiply32To64)(int64_t operand0, int64_t operand1); |
725 EXPECT_EQ(3, | 758 EXPECT_EQ(3, |
726 EXECUTE_TEST_CODE_INT64_LL(Multiply32To64, test->entry(), -3, -2)); | 759 EXECUTE_TEST_CODE_INT64_LL(Multiply32To64, test->entry(), -3, -2)); |
727 } | 760 } |
728 | 761 |
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3779 | 3812 |
3780 | 3813 |
3781 ASSEMBLER_TEST_RUN(Vnegqs, test) { | 3814 ASSEMBLER_TEST_RUN(Vnegqs, test) { |
3782 EXPECT(test != NULL); | 3815 EXPECT(test != NULL); |
3783 typedef float (*Vnegqs)(); | 3816 typedef float (*Vnegqs)(); |
3784 float res = EXECUTE_TEST_CODE_FLOAT(Vnegqs, test->entry()); | 3817 float res = EXECUTE_TEST_CODE_FLOAT(Vnegqs, test->entry()); |
3785 EXPECT_FLOAT_EQ(2.0, res, 0.0001f); | 3818 EXPECT_FLOAT_EQ(2.0, res, 0.0001f); |
3786 } | 3819 } |
3787 | 3820 |
3788 | 3821 |
| 3822 ASSEMBLER_TEST_GENERATE(MultCheckOverflow, assembler) { |
| 3823 // Both positive, no overflow |
| 3824 Label overflow1, test1; |
| 3825 __ LoadImmediate(R0, 42); |
| 3826 __ LoadImmediate(R1, 0xff); |
| 3827 __ LoadImmediate(R2, 0xf0); |
| 3828 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow1); |
| 3829 __ b(&test1); |
| 3830 __ Bind(&overflow1); |
| 3831 __ LoadImmediate(R0, 1); |
| 3832 __ Ret(); |
| 3833 |
| 3834 |
| 3835 // Left negative no overflow. |
| 3836 __ Bind(&test1); |
| 3837 Label overflow2, test2; |
| 3838 __ LoadImmediate(R1, -0xff); |
| 3839 __ LoadImmediate(R2, 0xf0); |
| 3840 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow2); |
| 3841 __ b(&test2); |
| 3842 __ Bind(&overflow2); |
| 3843 __ LoadImmediate(R0, 2); |
| 3844 __ Ret(); |
| 3845 |
| 3846 // Right negative no overflow |
| 3847 Label overflow3, test3; |
| 3848 __ Bind(&test2); |
| 3849 __ LoadImmediate(R1, 0xff); |
| 3850 __ LoadImmediate(R2, -0xf0); |
| 3851 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow3); |
| 3852 __ b(&test3); |
| 3853 __ Bind(&overflow3); |
| 3854 __ LoadImmediate(R0, 3); |
| 3855 __ Ret(); |
| 3856 |
| 3857 // Both negative no overflow. |
| 3858 Label overflow4, test4; |
| 3859 __ Bind(&test3); |
| 3860 __ LoadImmediate(R1, -0xff); |
| 3861 __ LoadImmediate(R2, -0xf0); |
| 3862 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &overflow4); |
| 3863 __ b(&test4); |
| 3864 __ Bind(&overflow4); |
| 3865 __ LoadImmediate(R0, 4); |
| 3866 __ Ret(); |
| 3867 |
| 3868 // Both positive with overflow. |
| 3869 Label test5; |
| 3870 __ Bind(&test4); |
| 3871 __ LoadImmediate(R1, 0x0fffffff); |
| 3872 __ LoadImmediate(R2, 0xffff); |
| 3873 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test5); |
| 3874 __ LoadImmediate(R0, 5); |
| 3875 __ Ret(); |
| 3876 |
| 3877 // left negative with overflow. |
| 3878 Label test6; |
| 3879 __ Bind(&test5); |
| 3880 __ LoadImmediate(R1, -0x0fffffff); |
| 3881 __ LoadImmediate(R2, 0xffff); |
| 3882 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test6); |
| 3883 __ LoadImmediate(R0, 6); |
| 3884 __ Ret(); |
| 3885 |
| 3886 // right negative with overflow. |
| 3887 Label test7; |
| 3888 __ Bind(&test6); |
| 3889 __ LoadImmediate(R1, 0x0fffffff); |
| 3890 __ LoadImmediate(R2, -0xffff); |
| 3891 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test7); |
| 3892 __ LoadImmediate(R0, 7); |
| 3893 __ Ret(); |
| 3894 |
| 3895 // both negative with overflow. |
| 3896 Label test8; |
| 3897 __ Bind(&test7); |
| 3898 __ LoadImmediate(R1, -0x0fffffff); |
| 3899 __ LoadImmediate(R2, -0xffff); |
| 3900 __ CheckMultSignedOverflow(R1, R2, R3, D0, D1, &test8); |
| 3901 __ LoadImmediate(R0, 8); |
| 3902 __ Ret(); |
| 3903 |
| 3904 __ Bind(&test8); |
| 3905 __ Ret(); |
| 3906 } |
| 3907 |
| 3908 |
| 3909 ASSEMBLER_TEST_RUN(MultCheckOverflow, test) { |
| 3910 EXPECT(test != NULL); |
| 3911 typedef int (*Tst)(); |
| 3912 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry())); |
| 3913 } |
| 3914 |
| 3915 |
3789 // Called from assembler_test.cc. | 3916 // Called from assembler_test.cc. |
3790 // LR: return address. | 3917 // LR: return address. |
3791 // R0: context. | 3918 // R0: context. |
3792 // R1: value. | 3919 // R1: value. |
3793 // R2: growable array. | 3920 // R2: growable array. |
3794 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) { | 3921 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) { |
3795 __ PushList((1 << CTX) | (1 << LR)); | 3922 __ PushList((1 << CTX) | (1 << LR)); |
3796 __ mov(CTX, ShifterOperand(R0)); | 3923 __ mov(CTX, ShifterOperand(R0)); |
3797 __ StoreIntoObject(R2, | 3924 __ StoreIntoObject(R2, |
3798 FieldAddress(R2, GrowableObjectArray::data_offset()), | 3925 FieldAddress(R2, GrowableObjectArray::data_offset()), |
3799 R1); | 3926 R1); |
3800 __ PopList((1 << CTX) | (1 << LR)); | 3927 __ PopList((1 << CTX) | (1 << LR)); |
3801 __ Ret(); | 3928 __ Ret(); |
3802 } | 3929 } |
3803 | 3930 |
3804 } // namespace dart | 3931 } // namespace dart |
3805 | 3932 |
3806 #endif // defined TARGET_ARCH_ARM | 3933 #endif // defined TARGET_ARCH_ARM |
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