Index: src/arm/assembler-arm.h |
diff --git a/src/arm/assembler-arm.h b/src/arm/assembler-arm.h |
index 1283c3984a6454a5faa033df5a844a63a7f39a4d..32d79a39e0a52398ad577082bc1c5c938d0fab64 100644 |
--- a/src/arm/assembler-arm.h |
+++ b/src/arm/assembler-arm.h |
@@ -302,6 +302,20 @@ struct QwNeonRegister { |
*m = (encoded_code & 0x10) >> 4; |
*vm = encoded_code & 0x0F; |
} |
+ DwVfpRegister low() const { |
+ DwVfpRegister reg; |
+ reg.reg_code = reg_code * 2; |
+ |
+ DCHECK(reg.is_valid()); |
+ return reg; |
+ } |
+ DwVfpRegister high() const { |
+ DwVfpRegister reg; |
+ reg.reg_code = reg_code * 2 + 1; |
+ |
+ DCHECK(reg.is_valid()); |
+ return reg; |
+ } |
int reg_code; |
}; |
@@ -405,6 +419,7 @@ const QwNeonRegister q15 = { 15 }; |
#define kLastCalleeSavedDoubleReg d15 |
#define kDoubleRegZero d14 |
#define kScratchDoubleReg d15 |
+#define kScratchQuadReg q7 // After use, kDoubleRegZero must be reset to 0. |
// Coprocessor register |
@@ -1133,6 +1148,8 @@ class Assembler : public AssemblerBase { |
void vmov(const DwVfpRegister dst, |
const DwVfpRegister src, |
const Condition cond = al); |
+ void vmov(const QwNeonRegister dst, |
+ const QwNeonRegister src); |
void vmov(const DwVfpRegister dst, |
const VmovIndex index, |
const Register src, |
@@ -1313,8 +1330,8 @@ class Assembler : public AssemblerBase { |
const NeonMemOperand& dst); |
void vmovl(NeonDataType dt, QwNeonRegister dst, DwVfpRegister src); |
- // Currently, vswp supports only D0 to D31. |
- void vswp(DwVfpRegister srcdst0, DwVfpRegister srcdst1); |
+ void vswp(DwVfpRegister dst, DwVfpRegister src); |
martyn.capewell
2016/11/23 20:08:46
I guess this is a deliberate change, but I named t
bbudge
2016/11/24 02:22:53
I'll change it back.
|
+ void vswp(QwNeonRegister dst, QwNeonRegister src); |
// Pseudo instructions |
@@ -1611,6 +1628,12 @@ class Assembler : public AssemblerBase { |
(reg.reg_code < LowDwVfpRegister::kMaxNumLowRegisters); |
} |
+ bool VfpRegisterIsAvailable(QwNeonRegister reg) { |
+ DCHECK(reg.is_valid()); |
+ return IsEnabled(VFP32DREGS) || |
+ (reg.reg_code < LowDwVfpRegister::kMaxNumLowRegisters / 2); |
+ } |
+ |
private: |
int next_buffer_check_; // pc offset of next buffer check |