[Turbofan] Add ARM support for simd128 moves and swaps.

src/arm/constants-arm.h

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_ARM_CONSTANTS_ARM_H_
 #define V8_ARM_CONSTANTS_ARM_H_
 
 #include <stdint.h>
 
 #include "src/base/logging.h"
@@ skipping 356 matching lines @@
   kStopCode = 1 << 23
 };
 const uint32_t kStopCodeMask = kStopCode - 1;
 const uint32_t kMaxStopCode = kStopCode - 1;
 const int32_t  kDefaultStopCode = -1;
 
 
 // Type of VFP register. Determines register encoding.
 enum VFPRegPrecision {
   kSinglePrecision = 0,
-  kDoublePrecision = 1
+  kDoublePrecision = 1,
+  kSimd128Precision = 2
 };
 
-
 // VFP FPSCR constants.
 enum VFPConversionMode {
   kFPSCRRounding = 0,
   kDefaultRoundToZero = 1
 };
 
 // This mask does not include the "inexact" or "input denormal" cumulative
 // exceptions flags, because we usually don't want to check for it.
 const uint32_t kVFPExceptionMask = 0xf;
 const uint32_t kVFPInvalidOpExceptionBit = 1 << 0;
@@ skipping 274 matching lines @@
     return reinterpret_cast<Instruction*>(pc);
   }
 
 
  private:
   // Join split register codes, depending on single or double precision.
   // four_bit is the position of the least-significant bit of the four
   // bit specifier. one_bit is the position of the additional single bit
   // specifier.
   inline int VFPGlueRegValue(VFPRegPrecision pre, int four_bit, int one_bit) {
-    if (pre == kSinglePrecision) {
+    if (pre == kDoublePrecision) {

[martyn.capewell, 2016/11/23 20:08:46]

As Q is encoded in the same way as D, but as Q*2, how about something like:
if (pre == kSinglePrecision) {
  return (Bits(four_bit + 3, four_bit) << 1) | Bit(one_bit);
} else {
  int reg_num = (Bit(one_bit) << 4) | Bits(four_bit + 3, four_bit);
  if (pre == kDoublePrecision) {
    return reg_num;
  }
  DCHECK_EQ(kSimd128Precision, pre);
  DCHECK_EQ(reg_num & 1, 0);
  return reg_num / 2;
}

[bbudge, 2016/11/24 02:22:53]

Done.

+      return (Bit(one_bit) << 4) | Bits(four_bit + 3, four_bit);
+    } else if (pre == kSinglePrecision) {
       return (Bits(four_bit + 3, four_bit) << 1) | Bit(one_bit);
     }
-    return (Bit(one_bit) << 4) | Bits(four_bit + 3, four_bit);
+    DCHECK_EQ(kSimd128Precision, pre);
+    return (Bit(one_bit) << 3) | Bits(four_bit + 3, four_bit) >> 1;
   }
 
   // We need to prevent the creation of instances of class Instruction.
   DISALLOW_IMPLICIT_CONSTRUCTORS(Instruction);
 };
 
 
 // Helper functions for converting between register numbers and names.
 class Registers {
  public:
@@ skipping 26 matching lines @@
 
  private:
   static const char* names_[kNumVFPRegisters];
 };
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_ARM_CONSTANTS_ARM_H_