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Unified Diff: runtime/vm/assembler_arm64_test.cc

Issue 2481873005: clang-format runtime/vm (Closed)
Patch Set: Merge Created 4 years, 1 month ago
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Index: runtime/vm/assembler_arm64_test.cc
diff --git a/runtime/vm/assembler_arm64_test.cc b/runtime/vm/assembler_arm64_test.cc
index ea2d2dfc8f8381e7194daceee3521794bf638039..1bd0644ace30684dd72016e35b0c5ea9f293c1f5 100644
--- a/runtime/vm/assembler_arm64_test.cc
+++ b/runtime/vm/assembler_arm64_test.cc
@@ -137,8 +137,8 @@ ASSEMBLER_TEST_GENERATE(Movk0, assembler) {
ASSEMBLER_TEST_RUN(Movk0, test) {
typedef int64_t (*Int64Return)() DART_UNUSED;
- EXPECT_EQ(
- 42LL | (1LL << 48), EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
+ EXPECT_EQ(42LL | (1LL << 48),
+ EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
}
@@ -151,8 +151,8 @@ ASSEMBLER_TEST_GENERATE(Movk1, assembler) {
ASSEMBLER_TEST_RUN(Movk1, test) {
typedef int64_t (*Int64Return)() DART_UNUSED;
- EXPECT_EQ(
- (42LL << 16) | 1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
+ EXPECT_EQ((42LL << 16) | 1,
+ EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
}
@@ -165,8 +165,8 @@ ASSEMBLER_TEST_GENERATE(Movk2, assembler) {
ASSEMBLER_TEST_RUN(Movk2, test) {
typedef int64_t (*Int64Return)() DART_UNUSED;
- EXPECT_EQ(
- (42LL << 32) | 1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
+ EXPECT_EQ((42LL << 32) | 1,
+ EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
}
@@ -179,8 +179,8 @@ ASSEMBLER_TEST_GENERATE(Movk3, assembler) {
ASSEMBLER_TEST_RUN(Movk3, test) {
typedef int64_t (*Int64Return)() DART_UNUSED;
- EXPECT_EQ(
- (42LL << 48) | 1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
+ EXPECT_EQ((42LL << 48) | 1,
+ EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
}
@@ -255,7 +255,7 @@ ASSEMBLER_TEST_RUN(AddASRReg, test) {
ASSEMBLER_TEST_GENERATE(AddASRNegReg, assembler) {
__ movz(R0, Immediate(43), 0);
- __ movn(R1, Immediate(0), 0); // R1 <- -1
+ __ movn(R1, Immediate(0), 0); // R1 <- -1
__ add(R1, ZR, Operand(R1, LSL, 3)); // R1 <- -8
__ add(R0, R0, Operand(R1, ASR, 3)); // R0 <- 43 + (-8 >> 3)
__ ret();
@@ -272,7 +272,7 @@ ASSEMBLER_TEST_RUN(AddASRNegReg, test) {
ASSEMBLER_TEST_GENERATE(AddExtReg, assembler) {
__ movz(R0, Immediate(43), 0);
__ movz(R1, Immediate(0xffff), 0);
- __ movk(R1, Immediate(0xffff), 1); // R1 <- -1 (32-bit)
+ __ movk(R1, Immediate(0xffff), 1); // R1 <- -1 (32-bit)
__ add(R0, R0, Operand(R1, SXTW, 0)); // R0 <- R0 + (sign extended R1)
__ ret();
}
@@ -289,8 +289,8 @@ ASSEMBLER_TEST_GENERATE(AddCarryInOut, assembler) {
__ LoadImmediate(R1, 1);
__ LoadImmediate(R0, 0);
__ adds(IP0, R2, Operand(R1)); // c_out = 1.
- __ adcs(IP0, R2, R0); // c_in = 1, c_out = 1.
- __ adc(R0, R0, R0); // c_in = 1.
+ __ adcs(IP0, R2, R0); // c_in = 1, c_out = 1.
+ __ adc(R0, R0, R0); // c_in = 1.
__ ret();
}
@@ -305,8 +305,8 @@ ASSEMBLER_TEST_GENERATE(SubCarryInOut, assembler) {
__ LoadImmediate(R1, 1);
__ LoadImmediate(R0, 0);
__ subs(IP0, R0, Operand(R1)); // c_out = 1.
- __ sbcs(IP0, R0, R0); // c_in = 1, c_out = 1.
- __ sbc(R0, R0, R0); // c_in = 1.
+ __ sbcs(IP0, R0, R0); // c_in = 1, c_out = 1.
+ __ sbc(R0, R0, R0); // c_in = 1.
__ ret();
}
@@ -323,8 +323,8 @@ ASSEMBLER_TEST_GENERATE(Overflow, assembler) {
__ LoadImmediate(R2, 0xFFFFFFFFFFFFFFFF);
__ LoadImmediate(R3, 0x7FFFFFFFFFFFFFFF);
__ adds(IP0, R2, Operand(R1)); // c_out = 1.
- __ adcs(IP0, R3, R0); // c_in = 1, c_out = 1, v = 1.
- __ csinc(R0, R0, R0, VS); // R0 = v ? R0 : R0 + 1.
+ __ adcs(IP0, R3, R0); // c_in = 1, c_out = 1, v = 1.
+ __ csinc(R0, R0, R0, VS); // R0 = v ? R0 : R0 + 1.
__ ret();
}
@@ -340,8 +340,8 @@ ASSEMBLER_TEST_GENERATE(WordAddCarryInOut, assembler) {
__ LoadImmediate(R1, 1);
__ LoadImmediate(R0, 0);
__ addsw(IP0, R2, Operand(R1)); // c_out = 1.
- __ adcsw(IP0, R2, R0); // c_in = 1, c_out = 1.
- __ adcw(R0, R0, R0); // c_in = 1.
+ __ adcsw(IP0, R2, R0); // c_in = 1, c_out = 1.
+ __ adcw(R0, R0, R0); // c_in = 1.
__ ret();
}
@@ -356,8 +356,8 @@ ASSEMBLER_TEST_GENERATE(WordSubCarryInOut, assembler) {
__ LoadImmediate(R1, 1);
__ LoadImmediate(R0, 0);
__ subsw(IP0, R0, Operand(R1)); // c_out = 1.
- __ sbcsw(IP0, R0, R0); // c_in = 1, c_out = 1.
- __ sbcw(R0, R0, R0); // c_in = 1.
+ __ sbcsw(IP0, R0, R0); // c_in = 1, c_out = 1.
+ __ sbcw(R0, R0, R0); // c_in = 1.
__ ret();
}
@@ -374,8 +374,8 @@ ASSEMBLER_TEST_GENERATE(WordOverflow, assembler) {
__ LoadImmediate(R2, 0xFFFFFFFF);
__ LoadImmediate(R3, 0x7FFFFFFF);
__ addsw(IP0, R2, Operand(R1)); // c_out = 1.
- __ adcsw(IP0, R3, R0); // c_in = 1, c_out = 1, v = 1.
- __ csinc(R0, R0, R0, VS); // R0 = v ? R0 : R0 + 1.
+ __ adcsw(IP0, R3, R0); // c_in = 1, c_out = 1, v = 1.
+ __ csinc(R0, R0, R0, VS); // R0 = v ? R0 : R0 + 1.
__ ret();
}
@@ -391,8 +391,8 @@ ASSEMBLER_TEST_GENERATE(SimpleLoadStore, assembler) {
__ SetupDartSP();
__ movz(R0, Immediate(43), 0);
__ movz(R1, Immediate(42), 0);
- __ str(R1, Address(SP, -1*kWordSize, Address::PreIndex));
- __ ldr(R0, Address(SP, 1*kWordSize, Address::PostIndex));
+ __ str(R1, Address(SP, -1 * kWordSize, Address::PreIndex));
+ __ ldr(R0, Address(SP, 1 * kWordSize, Address::PostIndex));
__ RestoreCSP();
__ ret();
}
@@ -427,9 +427,9 @@ ASSEMBLER_TEST_GENERATE(LoadStoreLargeIndex, assembler) {
__ movz(R0, Immediate(43), 0);
__ movz(R1, Immediate(42), 0);
// Largest negative offset that can fit in the signed 9-bit immediate field.
- __ str(R1, Address(SP, -32*kWordSize, Address::PreIndex));
+ __ str(R1, Address(SP, -32 * kWordSize, Address::PreIndex));
// Largest positive kWordSize aligned offset that we can fit.
- __ ldr(R0, Address(SP, 31*kWordSize, Address::PostIndex));
+ __ ldr(R0, Address(SP, 31 * kWordSize, Address::PostIndex));
// Correction.
__ add(SP, SP, Operand(kWordSize)); // Restore SP.
__ RestoreCSP();
@@ -447,9 +447,9 @@ ASSEMBLER_TEST_GENERATE(LoadStoreLargeOffset, assembler) {
__ SetupDartSP();
__ movz(R0, Immediate(43), 0);
__ movz(R1, Immediate(42), 0);
- __ sub(SP, SP, Operand(512*kWordSize));
- __ str(R1, Address(SP, 512*kWordSize, Address::Offset));
- __ add(SP, SP, Operand(512*kWordSize));
+ __ sub(SP, SP, Operand(512 * kWordSize));
+ __ str(R1, Address(SP, 512 * kWordSize, Address::Offset));
+ __ add(SP, SP, Operand(512 * kWordSize));
__ ldr(R0, Address(SP));
__ RestoreCSP();
__ ret();
@@ -490,11 +490,11 @@ ASSEMBLER_TEST_GENERATE(LoadStoreScaledReg, assembler) {
__ movz(R0, Immediate(43), 0);
__ movz(R1, Immediate(42), 0);
__ movz(R2, Immediate(10), 0);
- __ sub(SP, SP, Operand(10*kWordSize));
+ __ sub(SP, SP, Operand(10 * kWordSize));
// Store R1 into SP + R2 * kWordSize.
__ str(R1, Address(SP, R2, UXTX, Address::Scaled));
__ ldr(R0, Address(SP, R2, UXTX, Address::Scaled));
- __ add(SP, SP, Operand(10*kWordSize));
+ __ add(SP, SP, Operand(10 * kWordSize));
__ RestoreCSP();
__ ret();
}
@@ -527,8 +527,8 @@ ASSEMBLER_TEST_GENERATE(SimpleLoadStorePair, assembler) {
__ SetupDartSP();
__ LoadImmediate(R2, 43);
__ LoadImmediate(R3, 42);
- __ stp(R2, R3, Address(SP, -2*kWordSize, Address::PairPreIndex));
- __ ldp(R0, R1, Address(SP, 2*kWordSize, Address::PairPostIndex));
+ __ stp(R2, R3, Address(SP, -2 * kWordSize, Address::PairPreIndex));
+ __ ldp(R0, R1, Address(SP, 2 * kWordSize, Address::PairPostIndex));
__ sub(R0, R0, Operand(R1));
__ RestoreCSP();
__ ret();
@@ -572,7 +572,7 @@ ASSEMBLER_TEST_GENERATE(Semaphore, assembler) {
__ stxr(TMP, R1, SP); // IP == 0, success
__ cmp(TMP, Operand(0));
__ b(&retry, NE); // NE if context switch occurred between ldrex and strex.
- __ Pop(R0); // 42
+ __ Pop(R0); // 42
__ RestoreCSP();
__ ret();
}
@@ -591,9 +591,9 @@ ASSEMBLER_TEST_GENERATE(FailedSemaphore, assembler) {
__ movz(R1, Immediate(42), 0);
__ Push(R0);
__ ldxr(R0, SP);
- __ clrex(); // Simulate a context switch.
+ __ clrex(); // Simulate a context switch.
__ stxr(TMP, R1, SP); // IP == 1, failure
- __ Pop(R0); // 40
+ __ Pop(R0); // 40
__ add(R0, R0, Operand(TMP));
__ RestoreCSP();
__ ret();
@@ -666,7 +666,7 @@ ASSEMBLER_TEST_RUN(OrrRegs, test) {
ASSEMBLER_TEST_GENERATE(OrnRegs, assembler) {
__ movz(R1, Immediate(32), 0);
- __ movn(R2, Immediate(0), 0); // R2 <- 0xffffffffffffffff.
+ __ movn(R2, Immediate(0), 0); // R2 <- 0xffffffffffffffff.
__ movk(R2, Immediate(0xffd5), 0); // R2 <- 0xffffffffffffffe5.
__ orn(R0, R1, Operand(R2));
__ ret();
@@ -1396,7 +1396,7 @@ ASSEMBLER_TEST_RUN(Sdiv_zero, test) {
ASSEMBLER_TEST_GENERATE(Udiv_corner, assembler) {
__ movz(R0, Immediate(0x8000), 3); // R0 <- 0x8000000000000000
- __ movn(R1, Immediate(0), 0); // R1 <- 0xffffffffffffffff
+ __ movn(R1, Immediate(0), 0); // R1 <- 0xffffffffffffffff
__ udiv(R2, R0, R1);
__ mov(R0, R2);
__ ret();
@@ -1412,7 +1412,7 @@ ASSEMBLER_TEST_RUN(Udiv_corner, test) {
ASSEMBLER_TEST_GENERATE(Sdiv_corner, assembler) {
__ movz(R3, Immediate(0x8000), 3); // R0 <- 0x8000000000000000
- __ movn(R1, Immediate(0), 0); // R1 <- 0xffffffffffffffff
+ __ movn(R1, Immediate(0), 0); // R1 <- 0xffffffffffffffff
__ sdiv(R2, R3, R1);
__ mov(R0, R2);
__ ret();
@@ -1545,8 +1545,8 @@ ASSEMBLER_TEST_RUN(Smulh_neg, test) {
ASSEMBLER_TEST_GENERATE(Umulh, assembler) {
__ movz(R1, Immediate(-1), 3); // 0xffff000000000000
- __ movz(R2, Immediate(7), 3); // 0x0007000000000000
- __ umulh(R0, R1, R2); // 0x0006fff900000000
+ __ movz(R2, Immediate(7), 3); // 0x0007000000000000
+ __ umulh(R0, R1, R2); // 0x0006fff900000000
__ ret();
}
@@ -1562,7 +1562,7 @@ ASSEMBLER_TEST_GENERATE(Umaddl, assembler) {
__ movn(R1, Immediate(0), 0); // W1 = 0xffffffff.
__ movz(R2, Immediate(7), 0); // W2 = 7.
__ movz(R3, Immediate(8), 0); // X3 = 8.
- __ umaddl(R0, R1, R2, R3); // X0 = W1*W2 + X3 = 0x700000001.
+ __ umaddl(R0, R1, R2, R3); // X0 = W1*W2 + X3 = 0x700000001.
__ ret();
}
@@ -1606,8 +1606,8 @@ ASSEMBLER_TEST_GENERATE(LoadImmediateMed2, assembler) {
ASSEMBLER_TEST_RUN(LoadImmediateMed2, test) {
typedef int64_t (*Int64Return)() DART_UNUSED;
- EXPECT_EQ(
- 0x4321f1234123, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
+ EXPECT_EQ(0x4321f1234123,
+ EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
}
@@ -1695,19 +1695,17 @@ ASSEMBLER_TEST_RUN(LoadHalfWordUnaligned, test) {
EXPECT(test != NULL);
typedef intptr_t (*LoadHalfWordUnaligned)(intptr_t) DART_UNUSED;
uint8_t buffer[4] = {
- 0x89, 0xAB, 0xCD, 0xEF,
+ 0x89, 0xAB, 0xCD, 0xEF,
};
- EXPECT_EQ(static_cast<int16_t>(static_cast<uint16_t>(0xAB89)),
- EXECUTE_TEST_CODE_INTPTR_INTPTR(
- LoadHalfWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[0])));
- EXPECT_EQ(static_cast<int16_t>(static_cast<uint16_t>(0xCDAB)),
- EXECUTE_TEST_CODE_INTPTR_INTPTR(
- LoadHalfWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[1])));
+ EXPECT_EQ(
+ static_cast<int16_t>(static_cast<uint16_t>(0xAB89)),
+ EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadHalfWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[0])));
+ EXPECT_EQ(
+ static_cast<int16_t>(static_cast<uint16_t>(0xCDAB)),
+ EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadHalfWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[1])));
}
@@ -1722,19 +1720,15 @@ ASSEMBLER_TEST_RUN(LoadHalfWordUnsignedUnaligned, test) {
EXPECT(test != NULL);
typedef intptr_t (*LoadHalfWordUnsignedUnaligned)(intptr_t) DART_UNUSED;
uint8_t buffer[4] = {
- 0x89, 0xAB, 0xCD, 0xEF,
+ 0x89, 0xAB, 0xCD, 0xEF,
};
- EXPECT_EQ(0xAB89,
- EXECUTE_TEST_CODE_INTPTR_INTPTR(
- LoadHalfWordUnsignedUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[0])));
- EXPECT_EQ(0xCDAB,
- EXECUTE_TEST_CODE_INTPTR_INTPTR(
- LoadHalfWordUnsignedUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[1])));
+ EXPECT_EQ(0xAB89, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+ LoadHalfWordUnsignedUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[0])));
+ EXPECT_EQ(0xCDAB, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+ LoadHalfWordUnsignedUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[1])));
}
@@ -1750,23 +1744,19 @@ ASSEMBLER_TEST_RUN(StoreHalfWordUnaligned, test) {
EXPECT(test != NULL);
typedef intptr_t (*StoreHalfWordUnaligned)(intptr_t) DART_UNUSED;
uint8_t buffer[4] = {
- 0, 0, 0, 0,
+ 0, 0, 0, 0,
};
- EXPECT_EQ(0xABCD,
- EXECUTE_TEST_CODE_INTPTR_INTPTR(
- StoreHalfWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[0])));
+ EXPECT_EQ(0xABCD, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+ StoreHalfWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[0])));
EXPECT_EQ(0xCD, buffer[0]);
EXPECT_EQ(0xAB, buffer[1]);
EXPECT_EQ(0, buffer[2]);
- EXPECT_EQ(0xABCD,
- EXECUTE_TEST_CODE_INTPTR_INTPTR(
- StoreHalfWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[1])));
+ EXPECT_EQ(0xABCD, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+ StoreHalfWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[1])));
EXPECT_EQ(0xCD, buffer[1]);
EXPECT_EQ(0xAB, buffer[2]);
EXPECT_EQ(0, buffer[3]);
@@ -1783,31 +1773,24 @@ ASSEMBLER_TEST_GENERATE(LoadWordUnaligned, assembler) {
ASSEMBLER_TEST_RUN(LoadWordUnaligned, test) {
EXPECT(test != NULL);
typedef int32_t (*LoadWordUnaligned)(intptr_t) DART_UNUSED;
- uint8_t buffer[8] = {
- 0x12, 0x34, 0x56, 0x78,
- 0x9A, 0xBC, 0xDE, 0xF0
- };
+ uint8_t buffer[8] = {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0};
- EXPECT_EQ(static_cast<int32_t>(0x78563412),
- EXECUTE_TEST_CODE_INT32_INTPTR(
- LoadWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[0])));
- EXPECT_EQ(static_cast<int32_t>(0x9A785634),
- EXECUTE_TEST_CODE_INT32_INTPTR(
- LoadWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[1])));
- EXPECT_EQ(static_cast<int32_t>(0xBC9A7856),
- EXECUTE_TEST_CODE_INT32_INTPTR(
- LoadWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[2])));
- EXPECT_EQ(static_cast<int32_t>(0xDEBC9A78),
- EXECUTE_TEST_CODE_INT32_INTPTR(
- LoadWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[3])));
+ EXPECT_EQ(
+ static_cast<int32_t>(0x78563412),
+ EXECUTE_TEST_CODE_INT32_INTPTR(LoadWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[0])));
+ EXPECT_EQ(
+ static_cast<int32_t>(0x9A785634),
+ EXECUTE_TEST_CODE_INT32_INTPTR(LoadWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[1])));
+ EXPECT_EQ(
+ static_cast<int32_t>(0xBC9A7856),
+ EXECUTE_TEST_CODE_INT32_INTPTR(LoadWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[2])));
+ EXPECT_EQ(
+ static_cast<int32_t>(0xDEBC9A78),
+ EXECUTE_TEST_CODE_INT32_INTPTR(LoadWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[3])));
}
@@ -1822,46 +1805,35 @@ ASSEMBLER_TEST_GENERATE(StoreWordUnaligned, assembler) {
ASSEMBLER_TEST_RUN(StoreWordUnaligned, test) {
EXPECT(test != NULL);
typedef intptr_t (*StoreWordUnaligned)(intptr_t) DART_UNUSED;
- uint8_t buffer[8] = {
- 0, 0, 0, 0,
- 0, 0, 0, 0
- };
+ uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
- EXPECT_EQ(0x12345678,
- EXECUTE_TEST_CODE_INTPTR_INTPTR(
- StoreWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[0])));
+ EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+ StoreWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[0])));
EXPECT_EQ(0x78, buffer[0]);
EXPECT_EQ(0x56, buffer[1]);
EXPECT_EQ(0x34, buffer[2]);
EXPECT_EQ(0x12, buffer[3]);
- EXPECT_EQ(0x12345678,
- EXECUTE_TEST_CODE_INTPTR_INTPTR(
- StoreWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[1])));
+ EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+ StoreWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[1])));
EXPECT_EQ(0x78, buffer[1]);
EXPECT_EQ(0x56, buffer[2]);
EXPECT_EQ(0x34, buffer[3]);
EXPECT_EQ(0x12, buffer[4]);
- EXPECT_EQ(0x12345678,
- EXECUTE_TEST_CODE_INTPTR_INTPTR(
- StoreWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[2])));
+ EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+ StoreWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[2])));
EXPECT_EQ(0x78, buffer[2]);
EXPECT_EQ(0x56, buffer[3]);
EXPECT_EQ(0x34, buffer[4]);
EXPECT_EQ(0x12, buffer[5]);
- EXPECT_EQ(0x12345678,
- EXECUTE_TEST_CODE_INTPTR_INTPTR(
- StoreWordUnaligned,
- test->entry(),
- reinterpret_cast<intptr_t>(&buffer[3])));
+ EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+ StoreWordUnaligned, test->entry(),
+ reinterpret_cast<intptr_t>(&buffer[3])));
EXPECT_EQ(0x78, buffer[3]);
EXPECT_EQ(0x56, buffer[4]);
EXPECT_EQ(0x34, buffer[5]);
@@ -2108,7 +2080,8 @@ ASSEMBLER_TEST_GENERATE(Fmovdi2, assembler) {
ASSEMBLER_TEST_RUN(Fmovdi2, test) {
typedef double (*DoubleReturn)() DART_UNUSED;
EXPECT_FLOAT_EQ(123412983.1324524315,
- EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()), 0.0001f);
+ EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()),
+ 0.0001f);
}
@@ -2143,8 +2116,8 @@ ASSEMBLER_TEST_RUN(Fmovdr, test) {
ASSEMBLER_TEST_GENERATE(FldrdFstrdPrePostIndex, assembler) {
__ SetupDartSP();
__ LoadDImmediate(V1, 42.0);
- __ fstrd(V1, Address(SP, -1*kWordSize, Address::PreIndex));
- __ fldrd(V0, Address(SP, 1*kWordSize, Address::PostIndex));
+ __ fstrd(V1, Address(SP, -1 * kWordSize, Address::PreIndex));
+ __ fldrd(V0, Address(SP, 1 * kWordSize, Address::PostIndex));
__ RestoreCSP();
__ ret();
}
@@ -2160,8 +2133,8 @@ ASSEMBLER_TEST_GENERATE(FldrsFstrsPrePostIndex, assembler) {
__ SetupDartSP();
__ LoadDImmediate(V1, 42.0);
__ fcvtsd(V2, V1);
- __ fstrs(V2, Address(SP, -1*kWordSize, Address::PreIndex));
- __ fldrs(V3, Address(SP, 1*kWordSize, Address::PostIndex));
+ __ fstrs(V2, Address(SP, -1 * kWordSize, Address::PreIndex));
+ __ fldrs(V3, Address(SP, 1 * kWordSize, Address::PostIndex));
__ fcvtds(V0, V3);
__ RestoreCSP();
__ ret();
@@ -2385,9 +2358,9 @@ ASSEMBLER_TEST_GENERATE(FldrdFstrdLargeIndex, assembler) {
__ LoadDImmediate(V0, 43.0);
__ LoadDImmediate(V1, 42.0);
// Largest negative offset that can fit in the signed 9-bit immediate field.
- __ fstrd(V1, Address(SP, -32*kWordSize, Address::PreIndex));
+ __ fstrd(V1, Address(SP, -32 * kWordSize, Address::PreIndex));
// Largest positive kWordSize aligned offset that we can fit.
- __ fldrd(V0, Address(SP, 31*kWordSize, Address::PostIndex));
+ __ fldrd(V0, Address(SP, 31 * kWordSize, Address::PostIndex));
// Correction.
__ add(SP, SP, Operand(kWordSize)); // Restore SP.
__ RestoreCSP();
@@ -2405,9 +2378,9 @@ ASSEMBLER_TEST_GENERATE(FldrdFstrdLargeOffset, assembler) {
__ SetupDartSP();
__ LoadDImmediate(V0, 43.0);
__ LoadDImmediate(V1, 42.0);
- __ sub(SP, SP, Operand(512*kWordSize));
- __ fstrd(V1, Address(SP, 512*kWordSize, Address::Offset));
- __ add(SP, SP, Operand(512*kWordSize));
+ __ sub(SP, SP, Operand(512 * kWordSize));
+ __ fstrd(V1, Address(SP, 512 * kWordSize, Address::Offset));
+ __ add(SP, SP, Operand(512 * kWordSize));
__ fldrd(V0, Address(SP));
__ RestoreCSP();
__ ret();
@@ -2448,11 +2421,11 @@ ASSEMBLER_TEST_GENERATE(FldrdFstrdScaledReg, assembler) {
__ LoadDImmediate(V0, 43.0);
__ LoadDImmediate(V1, 42.0);
__ movz(R2, Immediate(10), 0);
- __ sub(SP, SP, Operand(10*kWordSize));
+ __ sub(SP, SP, Operand(10 * kWordSize));
// Store V1 into SP + R2 * kWordSize.
__ fstrd(V1, Address(SP, R2, UXTX, Address::Scaled));
__ fldrd(V0, Address(SP, R2, UXTX, Address::Scaled));
- __ add(SP, SP, Operand(10*kWordSize));
+ __ add(SP, SP, Operand(10 * kWordSize));
__ RestoreCSP();
__ ret();
}
@@ -3578,9 +3551,12 @@ ASSEMBLER_TEST_RUN(Vsqrtd, test) {
// This is the same function as in the Simulator.
static float arm_recip_estimate(float a) {
// From the ARM Architecture Reference Manual A2-85.
- if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
- else if (a == 0.0) return kPosInfinity;
- else if (isnan(a)) return a;
+ if (isinf(a) || (fabs(a) >= exp2f(126)))
+ return 0.0;
+ else if (a == 0.0)
+ return kPosInfinity;
+ else if (isnan(a))
+ return a;
uint32_t a_bits = bit_cast<uint32_t, float>(a);
// scaled = '0011 1111 1110' : a<22:0> : Zeros(29)
@@ -3600,7 +3576,7 @@ static float arm_recip_estimate(float a) {
// r in units of 1/256 rounded to nearest.
int32_t s = static_cast<int32_t>(256.0 * r + 0.5);
double estimate = static_cast<double>(s) / 256.0;
- ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+ ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
// result = sign : result_exp<7:0> : estimate<51:29>
int32_t result_bits =
@@ -3687,9 +3663,12 @@ ASSEMBLER_TEST_RUN(VRecps, test) {
static float arm_reciprocal_sqrt_estimate(float a) {
// From the ARM Architecture Reference Manual A2-87.
- if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
- else if (a == 0.0) return kPosInfinity;
- else if (isnan(a)) return a;
+ if (isinf(a) || (fabs(a) >= exp2f(126)))
+ return 0.0;
+ else if (a == 0.0)
+ return kPosInfinity;
+ else if (isnan(a))
+ return a;
uint32_t a_bits = bit_cast<uint32_t, float>(a);
uint64_t scaled;
@@ -3727,10 +3706,11 @@ static float arm_reciprocal_sqrt_estimate(float a) {
// r in units of 1/256 rounded to nearest.
int32_t s = static_cast<int>(256.0 * r + 0.5);
double estimate = static_cast<double>(s) / 256.0;
- ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+ ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
// result = 0 : result_exp<7:0> : estimate<51:29>
- int32_t result_bits = ((result_exp & 0xff) << 23) |
+ int32_t result_bits =
+ ((result_exp & 0xff) << 23) |
((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
return bit_cast<float, int32_t>(result_bits);
}
@@ -3756,16 +3736,16 @@ ASSEMBLER_TEST_RUN(Vrsqrtes, test) {
ASSEMBLER_TEST_GENERATE(Vrsqrtss, assembler) {
- __ LoadDImmediate(V1, 5.0);
- __ LoadDImmediate(V2, 10.0);
+ __ LoadDImmediate(V1, 5.0);
+ __ LoadDImmediate(V2, 10.0);
- __ fcvtsd(V1, V1);
- __ fcvtsd(V2, V2);
+ __ fcvtsd(V1, V1);
+ __ fcvtsd(V2, V2);
- __ vrsqrtss(V0, V1, V2);
+ __ vrsqrtss(V0, V1, V2);
- __ fcvtds(V0, V0);
- __ ret();
+ __ fcvtds(V0, V0);
+ __ ret();
}
@@ -3773,18 +3753,18 @@ ASSEMBLER_TEST_RUN(Vrsqrtss, test) {
EXPECT(test != NULL);
typedef double (*DoubleReturn)() DART_UNUSED;
double res = EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry());
- EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0)/2.0, res, 0.0001);
+ EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0) / 2.0, res, 0.0001);
}
ASSEMBLER_TEST_GENERATE(ReciprocalSqrt, assembler) {
- __ LoadDImmediate(V1, 147000.0);
- __ fcvtsd(V1, V1);
+ __ LoadDImmediate(V1, 147000.0);
+ __ fcvtsd(V1, V1);
- __ VRSqrts(V0, V1);
+ __ VRSqrts(V0, V1);
- __ fcvtds(V0, V0);
- __ ret();
+ __ fcvtds(V0, V0);
+ __ ret();
}
@@ -3792,7 +3772,7 @@ ASSEMBLER_TEST_RUN(ReciprocalSqrt, test) {
EXPECT(test != NULL);
typedef double (*DoubleReturn)() DART_UNUSED;
double res = EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry());
- EXPECT_FLOAT_EQ(1.0/sqrt(147000.0), res, 0.0001);
+ EXPECT_FLOAT_EQ(1.0 / sqrt(147000.0), res, 0.0001);
}
@@ -3807,8 +3787,7 @@ ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) {
__ Push(THR);
__ Push(LR);
__ mov(THR, R2);
- __ StoreIntoObject(R1,
- FieldAddress(R1, GrowableObjectArray::data_offset()),
+ __ StoreIntoObject(R1, FieldAddress(R1, GrowableObjectArray::data_offset()),
R0);
__ Pop(LR);
__ Pop(THR);
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