clang-format runtime/vm

runtime/vm/assembler_arm64_test.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/os.h"
@@ skipping 119 matching lines @@
 // movk
 ASSEMBLER_TEST_GENERATE(Movk0, assembler) {
   __ movz(R0, Immediate(1), 3);
   __ movk(R0, Immediate(42), 0);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Movk0, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
-  EXPECT_EQ(
-      42LL | (1LL << 48), EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
+  EXPECT_EQ(42LL | (1LL << 48),
+            EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Movk1, assembler) {
   __ movz(R0, Immediate(1), 0);
   __ movk(R0, Immediate(42), 1);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Movk1, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
-  EXPECT_EQ(
-      (42LL << 16) | 1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
+  EXPECT_EQ((42LL << 16) | 1,
+            EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Movk2, assembler) {
   __ movz(R0, Immediate(1), 0);
   __ movk(R0, Immediate(42), 2);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Movk2, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
-  EXPECT_EQ(
-      (42LL << 32) | 1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
+  EXPECT_EQ((42LL << 32) | 1,
+            EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Movk3, assembler) {
   __ movz(R0, Immediate(1), 0);
   __ movk(R0, Immediate(42), 3);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Movk3, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
-  EXPECT_EQ(
-      (42LL << 48) | 1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
+  EXPECT_EQ((42LL << 48) | 1,
+            EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(MovzBig, assembler) {
   __ movz(R0, Immediate(0x8000), 0);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(MovzBig, test) {
@@ skipping 54 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(AddASRReg, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddASRNegReg, assembler) {
   __ movz(R0, Immediate(43), 0);
-  __ movn(R1, Immediate(0), 0);  // R1 <- -1
+  __ movn(R1, Immediate(0), 0);         // R1 <- -1
   __ add(R1, ZR, Operand(R1, LSL, 3));  // R1 <- -8
   __ add(R0, R0, Operand(R1, ASR, 3));  // R0 <- 43 + (-8 >> 3)
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(AddASRNegReg, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 // TODO(zra): test other sign extension modes.
 ASSEMBLER_TEST_GENERATE(AddExtReg, assembler) {
   __ movz(R0, Immediate(43), 0);
   __ movz(R1, Immediate(0xffff), 0);
-  __ movk(R1, Immediate(0xffff), 1);  // R1 <- -1 (32-bit)
+  __ movk(R1, Immediate(0xffff), 1);     // R1 <- -1 (32-bit)
   __ add(R0, R0, Operand(R1, SXTW, 0));  // R0 <- R0 + (sign extended R1)
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(AddExtReg, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddCarryInOut, assembler) {
   __ LoadImmediate(R2, -1);
   __ LoadImmediate(R1, 1);
   __ LoadImmediate(R0, 0);
   __ adds(IP0, R2, Operand(R1));  // c_out = 1.
-  __ adcs(IP0, R2, R0);  // c_in = 1, c_out = 1.
-  __ adc(R0, R0, R0);  // c_in = 1.
+  __ adcs(IP0, R2, R0);           // c_in = 1, c_out = 1.
+  __ adc(R0, R0, R0);             // c_in = 1.
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(AddCarryInOut, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(SubCarryInOut, assembler) {
   __ LoadImmediate(R1, 1);
   __ LoadImmediate(R0, 0);
   __ subs(IP0, R0, Operand(R1));  // c_out = 1.
-  __ sbcs(IP0, R0, R0);  // c_in = 1, c_out = 1.
-  __ sbc(R0, R0, R0);  // c_in = 1.
+  __ sbcs(IP0, R0, R0);           // c_in = 1, c_out = 1.
+  __ sbc(R0, R0, R0);             // c_in = 1.
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(SubCarryInOut, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Overflow, assembler) {
   __ LoadImmediate(R0, 0);
   __ LoadImmediate(R1, 1);
   __ LoadImmediate(R2, 0xFFFFFFFFFFFFFFFF);
   __ LoadImmediate(R3, 0x7FFFFFFFFFFFFFFF);
   __ adds(IP0, R2, Operand(R1));  // c_out = 1.
-  __ adcs(IP0, R3, R0);  // c_in = 1, c_out = 1, v = 1.
-  __ csinc(R0, R0, R0, VS);  // R0 = v ? R0 : R0 + 1.
+  __ adcs(IP0, R3, R0);           // c_in = 1, c_out = 1, v = 1.
+  __ csinc(R0, R0, R0, VS);       // R0 = v ? R0 : R0 + 1.
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Overflow, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(WordAddCarryInOut, assembler) {
   __ LoadImmediate(R2, -1);
   __ LoadImmediate(R1, 1);
   __ LoadImmediate(R0, 0);
   __ addsw(IP0, R2, Operand(R1));  // c_out = 1.
-  __ adcsw(IP0, R2, R0);  // c_in = 1, c_out = 1.
-  __ adcw(R0, R0, R0);  // c_in = 1.
+  __ adcsw(IP0, R2, R0);           // c_in = 1, c_out = 1.
+  __ adcw(R0, R0, R0);             // c_in = 1.
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(WordAddCarryInOut, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(WordSubCarryInOut, assembler) {
   __ LoadImmediate(R1, 1);
   __ LoadImmediate(R0, 0);
   __ subsw(IP0, R0, Operand(R1));  // c_out = 1.
-  __ sbcsw(IP0, R0, R0);  // c_in = 1, c_out = 1.
-  __ sbcw(R0, R0, R0);  // c_in = 1.
+  __ sbcsw(IP0, R0, R0);           // c_in = 1, c_out = 1.
+  __ sbcw(R0, R0, R0);             // c_in = 1.
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(WordSubCarryInOut, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(0x0FFFFFFFF, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(WordOverflow, assembler) {
   __ LoadImmediate(R0, 0);
   __ LoadImmediate(R1, 1);
   __ LoadImmediate(R2, 0xFFFFFFFF);
   __ LoadImmediate(R3, 0x7FFFFFFF);
   __ addsw(IP0, R2, Operand(R1));  // c_out = 1.
-  __ adcsw(IP0, R3, R0);  // c_in = 1, c_out = 1, v = 1.
-  __ csinc(R0, R0, R0, VS);  // R0 = v ? R0 : R0 + 1.
+  __ adcsw(IP0, R3, R0);           // c_in = 1, c_out = 1, v = 1.
+  __ csinc(R0, R0, R0, VS);        // R0 = v ? R0 : R0 + 1.
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(WordOverflow, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 // Loads and Stores.
 ASSEMBLER_TEST_GENERATE(SimpleLoadStore, assembler) {
   __ SetupDartSP();
   __ movz(R0, Immediate(43), 0);
   __ movz(R1, Immediate(42), 0);
-  __ str(R1, Address(SP, -1*kWordSize, Address::PreIndex));
-  __ ldr(R0, Address(SP, 1*kWordSize, Address::PostIndex));
+  __ str(R1, Address(SP, -1 * kWordSize, Address::PreIndex));
+  __ ldr(R0, Address(SP, 1 * kWordSize, Address::PostIndex));
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(SimpleLoadStore, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
@@ skipping 14 matching lines @@
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(LoadStoreLargeIndex, assembler) {
   __ SetupDartSP();
   __ movz(R0, Immediate(43), 0);
   __ movz(R1, Immediate(42), 0);
   // Largest negative offset that can fit in the signed 9-bit immediate field.
-  __ str(R1, Address(SP, -32*kWordSize, Address::PreIndex));
+  __ str(R1, Address(SP, -32 * kWordSize, Address::PreIndex));
   // Largest positive kWordSize aligned offset that we can fit.
-  __ ldr(R0, Address(SP, 31*kWordSize, Address::PostIndex));
+  __ ldr(R0, Address(SP, 31 * kWordSize, Address::PostIndex));
   // Correction.
   __ add(SP, SP, Operand(kWordSize));  // Restore SP.
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LoadStoreLargeIndex, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(LoadStoreLargeOffset, assembler) {
   __ SetupDartSP();
   __ movz(R0, Immediate(43), 0);
   __ movz(R1, Immediate(42), 0);
-  __ sub(SP, SP, Operand(512*kWordSize));
-  __ str(R1, Address(SP, 512*kWordSize, Address::Offset));
-  __ add(SP, SP, Operand(512*kWordSize));
+  __ sub(SP, SP, Operand(512 * kWordSize));
+  __ str(R1, Address(SP, 512 * kWordSize, Address::Offset));
+  __ add(SP, SP, Operand(512 * kWordSize));
   __ ldr(R0, Address(SP));
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LoadStoreLargeOffset, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
@@ skipping 20 matching lines @@
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(LoadStoreScaledReg, assembler) {
   __ SetupDartSP();
   __ movz(R0, Immediate(43), 0);
   __ movz(R1, Immediate(42), 0);
   __ movz(R2, Immediate(10), 0);
-  __ sub(SP, SP, Operand(10*kWordSize));
+  __ sub(SP, SP, Operand(10 * kWordSize));
   // Store R1 into SP + R2 * kWordSize.
   __ str(R1, Address(SP, R2, UXTX, Address::Scaled));
   __ ldr(R0, Address(SP, R2, UXTX, Address::Scaled));
-  __ add(SP, SP, Operand(10*kWordSize));
+  __ add(SP, SP, Operand(10 * kWordSize));
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LoadStoreScaledReg, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
@@ skipping 12 matching lines @@
 ASSEMBLER_TEST_RUN(LoadSigned32Bit, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(SimpleLoadStorePair, assembler) {
   __ SetupDartSP();
   __ LoadImmediate(R2, 43);
   __ LoadImmediate(R3, 42);
-  __ stp(R2, R3, Address(SP, -2*kWordSize, Address::PairPreIndex));
-  __ ldp(R0, R1, Address(SP, 2*kWordSize, Address::PairPostIndex));
+  __ stp(R2, R3, Address(SP, -2 * kWordSize, Address::PairPreIndex));
+  __ ldp(R0, R1, Address(SP, 2 * kWordSize, Address::PairPostIndex));
   __ sub(R0, R0, Operand(R1));
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(SimpleLoadStorePair, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
@@ skipping 23 matching lines @@
   __ SetupDartSP();
   __ movz(R0, Immediate(40), 0);
   __ movz(R1, Immediate(42), 0);
   __ Push(R0);
   Label retry;
   __ Bind(&retry);
   __ ldxr(R0, SP);
   __ stxr(TMP, R1, SP);  // IP == 0, success
   __ cmp(TMP, Operand(0));
   __ b(&retry, NE);  // NE if context switch occurred between ldrex and strex.
-  __ Pop(R0);  // 42
+  __ Pop(R0);        // 42
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Semaphore, test) {
   EXPECT(test != NULL);
   typedef int (*Semaphore)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Semaphore, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(FailedSemaphore, assembler) {
   __ SetupDartSP();
   __ movz(R0, Immediate(40), 0);
   __ movz(R1, Immediate(42), 0);
   __ Push(R0);
   __ ldxr(R0, SP);
-  __ clrex();  // Simulate a context switch.
+  __ clrex();            // Simulate a context switch.
   __ stxr(TMP, R1, SP);  // IP == 1, failure
-  __ Pop(R0);  // 40
+  __ Pop(R0);            // 40
   __ add(R0, R0, Operand(TMP));
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(FailedSemaphore, test) {
   EXPECT(test != NULL);
   typedef int (*FailedSemaphore)() DART_UNUSED;
   EXPECT_EQ(41, EXECUTE_TEST_CODE_INT64(FailedSemaphore, test->entry()));
@@ skipping 52 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(OrrRegs, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(OrnRegs, assembler) {
   __ movz(R1, Immediate(32), 0);
-  __ movn(R2, Immediate(0), 0);  // R2 <- 0xffffffffffffffff.
+  __ movn(R2, Immediate(0), 0);       // R2 <- 0xffffffffffffffff.
   __ movk(R2, Immediate(0xffd5), 0);  // R2 <- 0xffffffffffffffe5.
   __ orn(R0, R1, Operand(R2));
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(OrnRegs, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
@@ skipping 709 matching lines @@
 
 ASSEMBLER_TEST_RUN(Sdiv_zero, test) {
   EXPECT(test != NULL);
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Udiv_corner, assembler) {
   __ movz(R0, Immediate(0x8000), 3);  // R0 <- 0x8000000000000000
-  __ movn(R1, Immediate(0), 0);  // R1 <- 0xffffffffffffffff
+  __ movn(R1, Immediate(0), 0);       // R1 <- 0xffffffffffffffff
   __ udiv(R2, R0, R1);
   __ mov(R0, R2);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Udiv_corner, test) {
   EXPECT(test != NULL);
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Sdiv_corner, assembler) {
   __ movz(R3, Immediate(0x8000), 3);  // R0 <- 0x8000000000000000
-  __ movn(R1, Immediate(0), 0);  // R1 <- 0xffffffffffffffff
+  __ movn(R1, Immediate(0), 0);       // R1 <- 0xffffffffffffffff
   __ sdiv(R2, R3, R1);
   __ mov(R0, R2);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Sdiv_corner, test) {
   EXPECT(test != NULL);
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(static_cast<int64_t>(0x8000000000000000),
@@ skipping 112 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Smulh_neg, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Umulh, assembler) {
   __ movz(R1, Immediate(-1), 3);  // 0xffff000000000000
-  __ movz(R2, Immediate(7), 3);  // 0x0007000000000000
-  __ umulh(R0, R1, R2);  // 0x0006fff900000000
+  __ movz(R2, Immediate(7), 3);   // 0x0007000000000000
+  __ umulh(R0, R1, R2);           // 0x0006fff900000000
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Umulh, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(static_cast<int64_t>(0x6fff900000000),
             EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Umaddl, assembler) {
   __ movn(R1, Immediate(0), 0);  // W1 = 0xffffffff.
   __ movz(R2, Immediate(7), 0);  // W2 = 7.
   __ movz(R3, Immediate(8), 0);  // X3 = 8.
-  __ umaddl(R0, R1, R2, R3);  // X0 = W1*W2 + X3 = 0x700000001.
+  __ umaddl(R0, R1, R2, R3);     // X0 = W1*W2 + X3 = 0x700000001.
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Umaddl, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
   EXPECT_EQ(0x700000001, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_GENERATE(LoadImmediateMed2, assembler) {
   __ LoadImmediate(R0, 0x4321f1234123);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LoadImmediateMed2, test) {
   typedef int64_t (*Int64Return)() DART_UNUSED;
-  EXPECT_EQ(
-      0x4321f1234123, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
+  EXPECT_EQ(0x4321f1234123,
+            EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(LoadImmediateLarge, assembler) {
   __ LoadImmediate(R0, 0x9287436598237465);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LoadImmediateLarge, test) {
@@ skipping 67 matching lines @@
   __ LoadUnaligned(R1, R0, TMP, kHalfword);
   __ mov(R0, R1);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LoadHalfWordUnaligned, test) {
   EXPECT(test != NULL);
   typedef intptr_t (*LoadHalfWordUnaligned)(intptr_t) DART_UNUSED;
   uint8_t buffer[4] = {
-    0x89, 0xAB, 0xCD, 0xEF,
+      0x89, 0xAB, 0xCD, 0xEF,
   };
 
-  EXPECT_EQ(static_cast<int16_t>(static_cast<uint16_t>(0xAB89)),
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadHalfWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[0])));
-  EXPECT_EQ(static_cast<int16_t>(static_cast<uint16_t>(0xCDAB)),
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadHalfWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[1])));
+  EXPECT_EQ(
+      static_cast<int16_t>(static_cast<uint16_t>(0xAB89)),
+      EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadHalfWordUnaligned, test->entry(),
+                                      reinterpret_cast<intptr_t>(&buffer[0])));
+  EXPECT_EQ(
+      static_cast<int16_t>(static_cast<uint16_t>(0xCDAB)),
+      EXECUTE_TEST_CODE_INTPTR_INTPTR(LoadHalfWordUnaligned, test->entry(),
+                                      reinterpret_cast<intptr_t>(&buffer[1])));
 }
 
 
 ASSEMBLER_TEST_GENERATE(LoadHalfWordUnsignedUnaligned, assembler) {
   __ LoadUnaligned(R1, R0, TMP, kUnsignedHalfword);
   __ mov(R0, R1);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LoadHalfWordUnsignedUnaligned, test) {
   EXPECT(test != NULL);
   typedef intptr_t (*LoadHalfWordUnsignedUnaligned)(intptr_t) DART_UNUSED;
   uint8_t buffer[4] = {
-    0x89, 0xAB, 0xCD, 0xEF,
+      0x89, 0xAB, 0xCD, 0xEF,
   };
 
-  EXPECT_EQ(0xAB89,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                LoadHalfWordUnsignedUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[0])));
-  EXPECT_EQ(0xCDAB,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                 LoadHalfWordUnsignedUnaligned,
-                 test->entry(),
-                 reinterpret_cast<intptr_t>(&buffer[1])));
+  EXPECT_EQ(0xAB89, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                        LoadHalfWordUnsignedUnaligned, test->entry(),
+                        reinterpret_cast<intptr_t>(&buffer[0])));
+  EXPECT_EQ(0xCDAB, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                        LoadHalfWordUnsignedUnaligned, test->entry(),
+                        reinterpret_cast<intptr_t>(&buffer[1])));
 }
 
 
 ASSEMBLER_TEST_GENERATE(StoreHalfWordUnaligned, assembler) {
   __ LoadImmediate(R1, 0xABCD);
   __ StoreUnaligned(R1, R0, TMP, kHalfword);
   __ mov(R0, R1);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(StoreHalfWordUnaligned, test) {
   EXPECT(test != NULL);
   typedef intptr_t (*StoreHalfWordUnaligned)(intptr_t) DART_UNUSED;
   uint8_t buffer[4] = {
-    0, 0, 0, 0,
+      0, 0, 0, 0,
   };
 
-  EXPECT_EQ(0xABCD,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreHalfWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[0])));
+  EXPECT_EQ(0xABCD, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                        StoreHalfWordUnaligned, test->entry(),
+                        reinterpret_cast<intptr_t>(&buffer[0])));
   EXPECT_EQ(0xCD, buffer[0]);
   EXPECT_EQ(0xAB, buffer[1]);
   EXPECT_EQ(0, buffer[2]);
 
-  EXPECT_EQ(0xABCD,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreHalfWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[1])));
+  EXPECT_EQ(0xABCD, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                        StoreHalfWordUnaligned, test->entry(),
+                        reinterpret_cast<intptr_t>(&buffer[1])));
   EXPECT_EQ(0xCD, buffer[1]);
   EXPECT_EQ(0xAB, buffer[2]);
   EXPECT_EQ(0, buffer[3]);
 }
 
 
 ASSEMBLER_TEST_GENERATE(LoadWordUnaligned, assembler) {
   __ LoadUnaligned(R1, R0, TMP, kUnsignedWord);
   __ mov(R0, R1);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LoadWordUnaligned, test) {
   EXPECT(test != NULL);
   typedef int32_t (*LoadWordUnaligned)(intptr_t) DART_UNUSED;
-  uint8_t buffer[8] = {
-    0x12, 0x34, 0x56, 0x78,
-    0x9A, 0xBC, 0xDE, 0xF0
-  };
+  uint8_t buffer[8] = {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0};
 
-  EXPECT_EQ(static_cast<int32_t>(0x78563412),
-            EXECUTE_TEST_CODE_INT32_INTPTR(
-                LoadWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[0])));
-  EXPECT_EQ(static_cast<int32_t>(0x9A785634),
-            EXECUTE_TEST_CODE_INT32_INTPTR(
-                LoadWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[1])));
-  EXPECT_EQ(static_cast<int32_t>(0xBC9A7856),
-            EXECUTE_TEST_CODE_INT32_INTPTR(
-                LoadWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[2])));
-  EXPECT_EQ(static_cast<int32_t>(0xDEBC9A78),
-            EXECUTE_TEST_CODE_INT32_INTPTR(
-                LoadWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[3])));
+  EXPECT_EQ(
+      static_cast<int32_t>(0x78563412),
+      EXECUTE_TEST_CODE_INT32_INTPTR(LoadWordUnaligned, test->entry(),
+                                     reinterpret_cast<intptr_t>(&buffer[0])));
+  EXPECT_EQ(
+      static_cast<int32_t>(0x9A785634),
+      EXECUTE_TEST_CODE_INT32_INTPTR(LoadWordUnaligned, test->entry(),
+                                     reinterpret_cast<intptr_t>(&buffer[1])));
+  EXPECT_EQ(
+      static_cast<int32_t>(0xBC9A7856),
+      EXECUTE_TEST_CODE_INT32_INTPTR(LoadWordUnaligned, test->entry(),
+                                     reinterpret_cast<intptr_t>(&buffer[2])));
+  EXPECT_EQ(
+      static_cast<int32_t>(0xDEBC9A78),
+      EXECUTE_TEST_CODE_INT32_INTPTR(LoadWordUnaligned, test->entry(),
+                                     reinterpret_cast<intptr_t>(&buffer[3])));
 }
 
 
 ASSEMBLER_TEST_GENERATE(StoreWordUnaligned, assembler) {
   __ LoadImmediate(R1, 0x12345678);
   __ StoreUnaligned(R1, R0, TMP, kUnsignedWord);
   __ mov(R0, R1);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(StoreWordUnaligned, test) {
   EXPECT(test != NULL);
   typedef intptr_t (*StoreWordUnaligned)(intptr_t) DART_UNUSED;
-  uint8_t buffer[8] = {
-    0, 0, 0, 0,
-    0, 0, 0, 0
-  };
+  uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
 
-  EXPECT_EQ(0x12345678,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[0])));
+  EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            StoreWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[0])));
   EXPECT_EQ(0x78, buffer[0]);
   EXPECT_EQ(0x56, buffer[1]);
   EXPECT_EQ(0x34, buffer[2]);
   EXPECT_EQ(0x12, buffer[3]);
 
-  EXPECT_EQ(0x12345678,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[1])));
+  EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            StoreWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[1])));
   EXPECT_EQ(0x78, buffer[1]);
   EXPECT_EQ(0x56, buffer[2]);
   EXPECT_EQ(0x34, buffer[3]);
   EXPECT_EQ(0x12, buffer[4]);
 
-  EXPECT_EQ(0x12345678,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[2])));
+  EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            StoreWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[2])));
   EXPECT_EQ(0x78, buffer[2]);
   EXPECT_EQ(0x56, buffer[3]);
   EXPECT_EQ(0x34, buffer[4]);
   EXPECT_EQ(0x12, buffer[5]);
 
-  EXPECT_EQ(0x12345678,
-            EXECUTE_TEST_CODE_INTPTR_INTPTR(
-                StoreWordUnaligned,
-                test->entry(),
-                reinterpret_cast<intptr_t>(&buffer[3])));
+  EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INTPTR_INTPTR(
+                            StoreWordUnaligned, test->entry(),
+                            reinterpret_cast<intptr_t>(&buffer[3])));
   EXPECT_EQ(0x78, buffer[3]);
   EXPECT_EQ(0x56, buffer[4]);
   EXPECT_EQ(0x34, buffer[5]);
   EXPECT_EQ(0x12, buffer[6]);
 }
 
 
 static void EnterTestFrame(Assembler* assembler) {
   __ EnterFrame(0);
   __ Push(CODE_REG);
@@ skipping 226 matching lines @@
 
 ASSEMBLER_TEST_GENERATE(Fmovdi2, assembler) {
   __ LoadDImmediate(V0, 123412983.1324524315);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Fmovdi2, test) {
   typedef double (*DoubleReturn)() DART_UNUSED;
   EXPECT_FLOAT_EQ(123412983.1324524315,
-      EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()), 0.0001f);
+                  EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()),
+                  0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Fmovrd, assembler) {
   __ LoadDImmediate(V1, 1.0);
   __ fmovrd(R0, V1);
   __ ret();
 }
 
 
@@ skipping 14 matching lines @@
 
 ASSEMBLER_TEST_RUN(Fmovdr, test) {
   typedef double (*DoubleReturn)() DART_UNUSED;
   EXPECT_EQ(1.0, EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(FldrdFstrdPrePostIndex, assembler) {
   __ SetupDartSP();
   __ LoadDImmediate(V1, 42.0);
-  __ fstrd(V1, Address(SP, -1*kWordSize, Address::PreIndex));
-  __ fldrd(V0, Address(SP, 1*kWordSize, Address::PostIndex));
+  __ fstrd(V1, Address(SP, -1 * kWordSize, Address::PreIndex));
+  __ fldrd(V0, Address(SP, 1 * kWordSize, Address::PostIndex));
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(FldrdFstrdPrePostIndex, test) {
   typedef double (*DoubleReturn)() DART_UNUSED;
   EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(FldrsFstrsPrePostIndex, assembler) {
   __ SetupDartSP();
   __ LoadDImmediate(V1, 42.0);
   __ fcvtsd(V2, V1);
-  __ fstrs(V2, Address(SP, -1*kWordSize, Address::PreIndex));
-  __ fldrs(V3, Address(SP, 1*kWordSize, Address::PostIndex));
+  __ fstrs(V2, Address(SP, -1 * kWordSize, Address::PreIndex));
+  __ fldrs(V3, Address(SP, 1 * kWordSize, Address::PostIndex));
   __ fcvtds(V0, V3);
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(FldrsFstrsPrePostIndex, test) {
   typedef double (*DoubleReturn)() DART_UNUSED;
   EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()));
 }
@@ skipping 203 matching lines @@
   typedef double (*DoubleReturn)() DART_UNUSED;
   EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(FldrdFstrdLargeIndex, assembler) {
   __ SetupDartSP();
   __ LoadDImmediate(V0, 43.0);
   __ LoadDImmediate(V1, 42.0);
   // Largest negative offset that can fit in the signed 9-bit immediate field.
-  __ fstrd(V1, Address(SP, -32*kWordSize, Address::PreIndex));
+  __ fstrd(V1, Address(SP, -32 * kWordSize, Address::PreIndex));
   // Largest positive kWordSize aligned offset that we can fit.
-  __ fldrd(V0, Address(SP, 31*kWordSize, Address::PostIndex));
+  __ fldrd(V0, Address(SP, 31 * kWordSize, Address::PostIndex));
   // Correction.
   __ add(SP, SP, Operand(kWordSize));  // Restore SP.
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(FldrdFstrdLargeIndex, test) {
   typedef double (*DoubleReturn)() DART_UNUSED;
   EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(FldrdFstrdLargeOffset, assembler) {
   __ SetupDartSP();
   __ LoadDImmediate(V0, 43.0);
   __ LoadDImmediate(V1, 42.0);
-  __ sub(SP, SP, Operand(512*kWordSize));
-  __ fstrd(V1, Address(SP, 512*kWordSize, Address::Offset));
-  __ add(SP, SP, Operand(512*kWordSize));
+  __ sub(SP, SP, Operand(512 * kWordSize));
+  __ fstrd(V1, Address(SP, 512 * kWordSize, Address::Offset));
+  __ add(SP, SP, Operand(512 * kWordSize));
   __ fldrd(V0, Address(SP));
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(FldrdFstrdLargeOffset, test) {
   typedef double (*DoubleReturn)() DART_UNUSED;
   EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()));
 }
@@ skipping 20 matching lines @@
   typedef double (*DoubleReturn)() DART_UNUSED;
   EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(FldrdFstrdScaledReg, assembler) {
   __ SetupDartSP();
   __ LoadDImmediate(V0, 43.0);
   __ LoadDImmediate(V1, 42.0);
   __ movz(R2, Immediate(10), 0);
-  __ sub(SP, SP, Operand(10*kWordSize));
+  __ sub(SP, SP, Operand(10 * kWordSize));
   // Store V1 into SP + R2 * kWordSize.
   __ fstrd(V1, Address(SP, R2, UXTX, Address::Scaled));
   __ fldrd(V0, Address(SP, R2, UXTX, Address::Scaled));
-  __ add(SP, SP, Operand(10*kWordSize));
+  __ add(SP, SP, Operand(10 * kWordSize));
   __ RestoreCSP();
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(FldrdFstrdScaledReg, test) {
   typedef double (*DoubleReturn)() DART_UNUSED;
   EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()));
 }
 
@@ skipping 1105 matching lines @@
 
 ASSEMBLER_TEST_RUN(Vsqrtd, test) {
   typedef double (*DoubleReturn)() DART_UNUSED;
   EXPECT_EQ(15.0, EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry()));
 }
 
 
 // This is the same function as in the Simulator.
 static float arm_recip_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-85.
-  if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
-  else if (a == 0.0) return kPosInfinity;
-  else if (isnan(a)) return a;
+  if (isinf(a) || (fabs(a) >= exp2f(126)))
+    return 0.0;
+  else if (a == 0.0)
+    return kPosInfinity;
+  else if (isnan(a))
+    return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
   // scaled = '0011 1111 1110' : a<22:0> : Zeros(29)
   uint64_t scaled = (static_cast<uint64_t>(0x3fe) << 52) |
                     ((static_cast<uint64_t>(a_bits) & 0x7fffff) << 29);
   // result_exp = 253 - UInt(a<30:23>)
   int32_t result_exp = 253 - ((a_bits >> 23) & 0xff);
   ASSERT((result_exp >= 1) && (result_exp <= 252));
 
   double scaled_d = bit_cast<double, uint64_t>(scaled);
   ASSERT((scaled_d >= 0.5) && (scaled_d < 1.0));
 
   // a in units of 1/512 rounded down.
   int32_t q = static_cast<int32_t>(scaled_d * 512.0);
   // reciprocal r.
   double r = 1.0 / ((static_cast<double>(q) + 0.5) / 512.0);
   // r in units of 1/256 rounded to nearest.
   int32_t s = static_cast<int32_t>(256.0 * r + 0.5);
   double estimate = static_cast<double>(s) / 256.0;
-  ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+  ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = sign : result_exp<7:0> : estimate<51:29>
   int32_t result_bits =
       (a_bits & 0x80000000) | ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrecpes, assembler) {
@@ skipping 66 matching lines @@
 
 ASSEMBLER_TEST_RUN(VRecps, test) {
   typedef double (*DoubleReturn)() DART_UNUSED;
   double res = EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry());
   EXPECT_FLOAT_EQ(42.0, res, 0.0001);
 }
 
 
 static float arm_reciprocal_sqrt_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-87.
-  if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
-  else if (a == 0.0) return kPosInfinity;
-  else if (isnan(a)) return a;
+  if (isinf(a) || (fabs(a) >= exp2f(126)))
+    return 0.0;
+  else if (a == 0.0)
+    return kPosInfinity;
+  else if (isnan(a))
+    return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
   uint64_t scaled;
   if (((a_bits >> 23) & 1) != 0) {
     // scaled = '0 01111111101' : operand<22:0> : Zeros(29)
     scaled = (static_cast<uint64_t>(0x3fd) << 52) |
              ((static_cast<uint64_t>(a_bits) & 0x7fffff) << 29);
   } else {
     // scaled = '0 01111111110' : operand<22:0> : Zeros(29)
     scaled = (static_cast<uint64_t>(0x3fe) << 52) |
@@ skipping 17 matching lines @@
     // range 0.5 <= a < 1.0
 
     // a in units of 1/256 rounded down.
     int32_t q1 = static_cast<int32_t>(scaled_d * 256.0);
     // reciprocal root r.
     r = 1.0 / sqrt((static_cast<double>(q1) + 0.5) / 256.0);
   }
   // r in units of 1/256 rounded to nearest.
   int32_t s = static_cast<int>(256.0 * r + 0.5);
   double estimate = static_cast<double>(s) / 256.0;
-  ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+  ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = 0 : result_exp<7:0> : estimate<51:29>
-  int32_t result_bits = ((result_exp & 0xff) << 23) |
+  int32_t result_bits =
+      ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrsqrtes, assembler) {
   __ LoadDImmediate(V1, 147.0);
   __ fcvtsd(V1, V1);
 
   __ vrsqrtes(V0, V1);
 
   __ fcvtds(V0, V0);
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Vrsqrtes, test) {
   EXPECT(test != NULL);
   typedef double (*DoubleReturn)() DART_UNUSED;
   double res = EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry());
   EXPECT_FLOAT_EQ(arm_reciprocal_sqrt_estimate(147.0), res, 0.0001);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrsqrtss, assembler) {
-    __ LoadDImmediate(V1, 5.0);
-    __ LoadDImmediate(V2, 10.0);
+  __ LoadDImmediate(V1, 5.0);
+  __ LoadDImmediate(V2, 10.0);
 
-    __ fcvtsd(V1, V1);
-    __ fcvtsd(V2, V2);
+  __ fcvtsd(V1, V1);
+  __ fcvtsd(V2, V2);
 
-    __ vrsqrtss(V0, V1, V2);
+  __ vrsqrtss(V0, V1, V2);
 
-    __ fcvtds(V0, V0);
-    __ ret();
+  __ fcvtds(V0, V0);
+  __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Vrsqrtss, test) {
   EXPECT(test != NULL);
   typedef double (*DoubleReturn)() DART_UNUSED;
   double res = EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry());
-  EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0)/2.0, res, 0.0001);
+  EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0) / 2.0, res, 0.0001);
 }
 
 
 ASSEMBLER_TEST_GENERATE(ReciprocalSqrt, assembler) {
-    __ LoadDImmediate(V1, 147000.0);
-    __ fcvtsd(V1, V1);
+  __ LoadDImmediate(V1, 147000.0);
+  __ fcvtsd(V1, V1);
 
-    __ VRSqrts(V0, V1);
+  __ VRSqrts(V0, V1);
 
-    __ fcvtds(V0, V0);
-    __ ret();
+  __ fcvtds(V0, V0);
+  __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(ReciprocalSqrt, test) {
   EXPECT(test != NULL);
   typedef double (*DoubleReturn)() DART_UNUSED;
   double res = EXECUTE_TEST_CODE_DOUBLE(DoubleReturn, test->entry());
-  EXPECT_FLOAT_EQ(1.0/sqrt(147000.0), res, 0.0001);
+  EXPECT_FLOAT_EQ(1.0 / sqrt(147000.0), res, 0.0001);
 }
 
 
 // Called from assembler_test.cc.
 // LR: return address.
 // R0: value.
 // R1: growable array.
 // R2: current thread.
 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) {
   __ SetupDartSP();
   __ Push(CODE_REG);
   __ Push(THR);
   __ Push(LR);
   __ mov(THR, R2);
-  __ StoreIntoObject(R1,
-                     FieldAddress(R1, GrowableObjectArray::data_offset()),
+  __ StoreIntoObject(R1, FieldAddress(R1, GrowableObjectArray::data_offset()),
                      R0);
   __ Pop(LR);
   __ Pop(THR);
   __ Pop(CODE_REG);
   __ RestoreCSP();
   __ ret();
 }
 
 }  // namespace dart
 
 #endif  // defined(TARGET_ARCH_ARM64)