clang-format runtime/vm

runtime/vm/simulator_arm64.cc

Index: runtime/vm/simulator_arm64.cc
diff --git a/runtime/vm/simulator_arm64.cc b/runtime/vm/simulator_arm64.cc
index 0cfcb2a85acf1df343bbedc639b040244c527a58..a0555677d03fa267299cbc1badf672e50d99727e 100644
--- a/runtime/vm/simulator_arm64.cc
+++ b/runtime/vm/simulator_arm64.cc
@@ -23,9 +23,13 @@
 
 namespace dart {
 
-DEFINE_FLAG(uint64_t, trace_sim_after, ULLONG_MAX,
+DEFINE_FLAG(uint64_t,
+            trace_sim_after,
+            ULLONG_MAX,
             "Trace simulator execution after instruction count reached.");
-DEFINE_FLAG(uint64_t, stop_sim_at, ULLONG_MAX,
+DEFINE_FLAG(uint64_t,
+            stop_sim_at,
+            ULLONG_MAX,
             "Instruction address or instruction count to stop simulator at.");
 
 
@@ -96,7 +100,9 @@ class SimulatorDebugger {
 
   static TokenPosition GetApproximateTokenIndex(const Code& code, uword pc);
 
-  static void PrintDartFrame(uword pc, uword fp, uword sp,
+  static void PrintDartFrame(uword pc,
+                             uword fp,
+                             uword sp,
                              const Function& function,
                              TokenPosition token_pos,
                              bool is_optimized,
@@ -119,8 +125,7 @@ SimulatorDebugger::SimulatorDebugger(Simulator* sim) {
 }
 
 
-SimulatorDebugger::~SimulatorDebugger() {
-}
+SimulatorDebugger::~SimulatorDebugger() {}
 
 
 void SimulatorDebugger::Stop(Instr* instr, const char* message) {
@@ -131,24 +136,19 @@ void SimulatorDebugger::Stop(Instr* instr, const char* message) {
 
 static Register LookupCpuRegisterByName(const char* name) {
   static const char* kNames[] = {
-      "r0",  "r1",  "r2",  "r3",
-      "r4",  "r5",  "r6",  "r7",
-      "r8",  "r9",  "r10", "r11",
-      "r12", "r13", "r14", "r15",
-      "r16", "r17", "r18", "r19",
-      "r20", "r21", "r22", "r23",
-      "r24", "r25", "r26", "r27",
-      "r28", "r29", "r30",
-
-      "ip0", "ip1", "pp",  "ctx", "fp",  "lr",  "sp", "zr",
+      "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
+      "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
+      "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+      "r24", "r25", "r26", "r27", "r28", "r29", "r30",
+
+      "ip0", "ip1", "pp",  "ctx", "fp",  "lr",  "sp",  "zr",
   };
   static const Register kRegisters[] = {
-      R0,  R1,  R2,  R3,  R4,  R5,  R6,  R7,
-      R8,  R9,  R10, R11, R12, R13, R14, R15,
-      R16, R17, R18, R19, R20, R21, R22, R23,
-      R24, R25, R26, R27, R28, R29, R30,
+      R0,  R1,  R2,  R3,  R4,  R5,  R6,  R7,  R8,  R9,  R10,
+      R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21,
+      R22, R23, R24, R25, R26, R27, R28, R29, R30,
 
-      IP0, IP1, PP, CTX, FP, LR, R31, ZR,
+      IP0, IP1, PP,  CTX, FP,  LR,  R31, ZR,
   };
   ASSERT(ARRAY_SIZE(kNames) == ARRAY_SIZE(kRegisters));
   for (unsigned i = 0; i < ARRAY_SIZE(kNames); i++) {
@@ -263,7 +263,7 @@ bool SimulatorDebugger::GetQValue(char* desc, simd_value_t* value) {
 
 
 TokenPosition SimulatorDebugger::GetApproximateTokenIndex(const Code& code,
-                                                            uword pc) {
+                                                          uword pc) {
   TokenPosition token_pos = TokenPosition::kNoSource;
   uword pc_offset = pc - code.PayloadStart();
   const PcDescriptors& descriptors =
@@ -280,7 +280,9 @@ TokenPosition SimulatorDebugger::GetApproximateTokenIndex(const Code& code,
 }
 
 
-void SimulatorDebugger::PrintDartFrame(uword pc, uword fp, uword sp,
+void SimulatorDebugger::PrintDartFrame(uword pc,
+                                       uword fp,
+                                       uword sp,
                                        const Function& function,
                                        TokenPosition token_pos,
                                        bool is_optimized,
@@ -293,19 +295,15 @@ void SimulatorDebugger::PrintDartFrame(uword pc, uword fp, uword sp,
   if (token_pos.IsReal()) {
     script.GetTokenLocation(token_pos, &line, &column);
   }
-  OS::Print("pc=0x%" Px " fp=0x%" Px " sp=0x%" Px " %s%s (%s:%" Pd
-            ":%" Pd ")\n",
-            pc, fp, sp,
-            is_optimized ? (is_inlined ? "inlined " : "optimized ") : "",
-            func_name.ToCString(),
-            url.ToCString(),
-            line, column);
+  OS::Print(
+      "pc=0x%" Px " fp=0x%" Px " sp=0x%" Px " %s%s (%s:%" Pd ":%" Pd ")\n", pc,
+      fp, sp, is_optimized ? (is_inlined ? "inlined " : "optimized ") : "",
+      func_name.ToCString(), url.ToCString(), line, column);
 }
 
 
 void SimulatorDebugger::PrintBacktrace() {
-  StackFrameIterator frames(sim_->get_register(FP),
-                            sim_->get_register(SP),
+  StackFrameIterator frames(sim_->get_register(FP), sim_->get_register(SP),
                             sim_->get_pc(),
                             StackFrameIterator::kDontValidateFrames);
   StackFrame* frame = frames.NextFrame();
@@ -330,25 +328,25 @@ void SimulatorDebugger::PrintBacktrace() {
           uword unoptimized_pc = it.pc();
           it.Advance();
           if (!it.Done()) {
-            PrintDartFrame(unoptimized_pc, frame->fp(), frame->sp(),
-                           inlined_function,
-                           GetApproximateTokenIndex(unoptimized_code,
-                                                    unoptimized_pc),
-                           true, true);
+            PrintDartFrame(
+                unoptimized_pc, frame->fp(), frame->sp(), inlined_function,
+                GetApproximateTokenIndex(unoptimized_code, unoptimized_pc),
+                true, true);
           }
         }
         // Print the optimized inlining frame below.
       }
-      PrintDartFrame(frame->pc(), frame->fp(), frame->sp(),
-                     function,
+      PrintDartFrame(frame->pc(), frame->fp(), frame->sp(), function,
                      GetApproximateTokenIndex(code, frame->pc()),
                      code.is_optimized(), false);
     } else {
       OS::Print("pc=0x%" Px " fp=0x%" Px " sp=0x%" Px " %s frame\n",
                 frame->pc(), frame->fp(), frame->sp(),
-                frame->IsEntryFrame() ? "entry" :
-                    frame->IsExitFrame() ? "exit" :
-                        frame->IsStubFrame() ? "stub" : "invalid");
+                frame->IsEntryFrame()
+                    ? "entry"
+                    : frame->IsExitFrame()
+                          ? "exit"
+                          : frame->IsStubFrame() ? "stub" : "invalid");
     }
     frame = frames.NextFrame();
   }
@@ -443,27 +441,28 @@ void SimulatorDebugger::Debug() {
                         "%" XSTR(ARG_SIZE) "s",
                         cmd, arg1, arg2);
       if ((strcmp(cmd, "h") == 0) || (strcmp(cmd, "help") == 0)) {
-        OS::Print("c/cont -- continue execution\n"
-                  "disasm -- disassemble instrs at current pc location\n"
-                  "  other variants are:\n"
-                  "    disasm <address>\n"
-                  "    disasm <address> <number_of_instructions>\n"
-                  "  by default 10 instrs are disassembled\n"
-                  "del -- delete breakpoints\n"
-                  "flags -- print flag values\n"
-                  "gdb -- transfer control to gdb\n"
-                  "h/help -- print this help string\n"
-                  "break <address> -- set break point at specified address\n"
-                  "p/print <reg or icount or value or *addr> -- print integer\n"
-                  "pf/printfloat <vreg or *addr> --print float value\n"
-                  "pd/printdouble <vreg or *addr> -- print double value\n"
-                  "pq/printquad <vreg or *addr> -- print vector register\n"
-                  "po/printobject <*reg or *addr> -- print object\n"
-                  "si/stepi -- single step an instruction\n"
-                  "trace -- toggle execution tracing mode\n"
-                  "bt -- print backtrace\n"
-                  "unstop -- if current pc is a stop instr make it a nop\n"
-                  "q/quit -- Quit the debugger and exit the program\n");
+        OS::Print(
+            "c/cont -- continue execution\n"
+            "disasm -- disassemble instrs at current pc location\n"
+            "  other variants are:\n"
+            "    disasm <address>\n"
+            "    disasm <address> <number_of_instructions>\n"
+            "  by default 10 instrs are disassembled\n"
+            "del -- delete breakpoints\n"
+            "flags -- print flag values\n"
+            "gdb -- transfer control to gdb\n"
+            "h/help -- print this help string\n"
+            "break <address> -- set break point at specified address\n"
+            "p/print <reg or icount or value or *addr> -- print integer\n"
+            "pf/printfloat <vreg or *addr> --print float value\n"
+            "pd/printdouble <vreg or *addr> -- print double value\n"
+            "pq/printquad <vreg or *addr> -- print vector register\n"
+            "po/printobject <*reg or *addr> -- print object\n"
+            "si/stepi -- single step an instruction\n"
+            "trace -- toggle execution tracing mode\n"
+            "bt -- print backtrace\n"
+            "unstop -- if current pc is a stop instr make it a nop\n"
+            "q/quit -- Quit the debugger and exit the program\n");
       } else if ((strcmp(cmd, "quit") == 0) || (strcmp(cmd, "q") == 0)) {
         OS::Print("Quitting\n");
         OS::Exit(0);
@@ -488,14 +487,12 @@ void SimulatorDebugger::Debug() {
         } else {
           OS::Print("print <reg or icount or value or *addr>\n");
         }
-      } else if ((strcmp(cmd, "pf") == 0) ||
-                 (strcmp(cmd, "printfloat") == 0)) {
+      } else if ((strcmp(cmd, "pf") == 0) || (strcmp(cmd, "printfloat") == 0)) {
         if (args == 2) {
           uint32_t value;
           if (GetSValue(arg1, &value)) {
             float svalue = bit_cast<float, uint32_t>(value);
-            OS::Print("%s: %d 0x%x %.8g\n",
-                arg1, value, value, svalue);
+            OS::Print("%s: %d 0x%x %.8g\n", arg1, value, value, svalue);
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
@@ -508,16 +505,15 @@ void SimulatorDebugger::Debug() {
           uint64_t long_value;
           if (GetDValue(arg1, &long_value)) {
             double dvalue = bit_cast<double, uint64_t>(long_value);
-            OS::Print("%s: %" Pu64 " 0x%" Px64 " %.8g\n",
-                arg1, long_value, long_value, dvalue);
+            OS::Print("%s: %" Pu64 " 0x%" Px64 " %.8g\n", arg1, long_value,
+                      long_value, dvalue);
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
         } else {
           OS::Print("printdouble <vreg or *addr>\n");
         }
-      } else if ((strcmp(cmd, "pq") == 0) ||
-                 (strcmp(cmd, "printquad") == 0)) {
+      } else if ((strcmp(cmd, "pq") == 0) || (strcmp(cmd, "printquad") == 0)) {
         if (args == 2) {
           simd_value_t quad_value;
           if (GetQValue(arg1, &quad_value)) {
@@ -555,8 +551,8 @@ void SimulatorDebugger::Debug() {
             if (Isolate::Current()->heap()->Contains(value)) {
               OS::Print("%s: \n", arg1);
 #if defined(DEBUG)
-              const Object& obj = Object::Handle(
-                  reinterpret_cast<RawObject*>(value));
+              const Object& obj =
+                  Object::Handle(reinterpret_cast<RawObject*>(value));
               obj.Print();
 #endif  // defined(DEBUG)
             } else {
@@ -687,9 +683,7 @@ char* SimulatorDebugger::ReadLine(const char* prompt) {
       return NULL;
     }
     intptr_t len = strlen(line_buf);
-    if (len > 1 &&
-        line_buf[len - 2] == '\\' &&
-        line_buf[len - 1] == '\n') {
+    if (len > 1 && line_buf[len - 2] == '\\' && line_buf[len - 1] == '\n') {
       // When we read a line that ends with a "\" we remove the escape and
       // append the remainder.
       line_buf[len - 2] = '\n';
@@ -735,8 +729,8 @@ char* SimulatorDebugger::ReadLine(const char* prompt) {
 
 // Synchronization primitives support.
 Mutex* Simulator::exclusive_access_lock_ = NULL;
-Simulator::AddressTag Simulator::exclusive_access_state_[kNumAddressTags] =
-    {{NULL, 0}};
+Simulator::AddressTag Simulator::exclusive_access_state_[kNumAddressTags] = {
+    {NULL, 0}};
 int Simulator::next_address_tag_ = 0;
 
 
@@ -753,9 +747,9 @@ Simulator::Simulator() {
   // the size specified by the user and the buffer space needed for
   // handling stack overflow exceptions. To be safe in potential
   // stack underflows we also add some underflow buffer space.
-  stack_ = new char[(OSThread::GetSpecifiedStackSize() +
-                     OSThread::kStackSizeBuffer +
-                     kSimulatorStackUnderflowSize)];
+  stack_ =
+      new char[(OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer +
+                kSimulatorStackUnderflowSize)];
   pc_modified_ = false;
   icount_ = 0;
   break_pc_ = NULL;
@@ -857,10 +851,9 @@ class Redirection {
     Redirection* list_head = list_;
     do {
       next_ = list_head;
-      list_head = reinterpret_cast<Redirection*>(
-          AtomicOperations::CompareAndSwapWord(
-              reinterpret_cast<uword*>(&list_),
-              reinterpret_cast<uword>(next_),
+      list_head =
+          reinterpret_cast<Redirection*>(AtomicOperations::CompareAndSwapWord(
+              reinterpret_cast<uword*>(&list_), reinterpret_cast<uword>(next_),
               reinterpret_cast<uword>(this)));
     } while (list_head != next_);
   }
@@ -903,8 +896,10 @@ Simulator* Simulator::Current() {
 
 
 // Sets the register in the architecture state.
-void Simulator::set_register(
-    Instr* instr, Register reg, int64_t value, R31Type r31t) {
+void Simulator::set_register(Instr* instr,
+                             Register reg,
+                             int64_t value,
+                             R31Type r31t) {
   // Register is in range.
   ASSERT((reg >= 0) && (reg < kNumberOfCpuRegisters));
   ASSERT(instr == NULL || reg != R18);  // R18 is globally reserved on iOS.
@@ -1020,9 +1015,9 @@ void Simulator::HandleIllegalAccess(uword addr, Instr* instr) {
   uword fault_pc = get_pc();
   uword last_pc = get_last_pc();
   char buffer[128];
-  snprintf(buffer, sizeof(buffer),
-      "illegal memory access at 0x%" Px ", pc=0x%" Px ", last_pc=0x%" Px"\n",
-      addr, fault_pc, last_pc);
+  snprintf(buffer, sizeof(buffer), "illegal memory access at 0x%" Px
+                                   ", pc=0x%" Px ", last_pc=0x%" Px "\n",
+           addr, fault_pc, last_pc);
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   // The debugger will return control in non-interactive mode.
@@ -1035,8 +1030,8 @@ void Simulator::HandleIllegalAccess(uword addr, Instr* instr) {
 // so let's just not generate any.
 void Simulator::UnalignedAccess(const char* msg, uword addr, Instr* instr) {
   char buffer[128];
-  snprintf(buffer, sizeof(buffer),
-           "unaligned %s at 0x%" Px ", pc=%p\n", msg, addr, instr);
+  snprintf(buffer, sizeof(buffer), "unaligned %s at 0x%" Px ", pc=%p\n", msg,
+           addr, instr);
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   // The debugger will not be able to single step past this instruction, but
@@ -1048,8 +1043,8 @@ void Simulator::UnalignedAccess(const char* msg, uword addr, Instr* instr) {
 void Simulator::UnimplementedInstruction(Instr* instr) {
   char buffer[128];
   snprintf(buffer, sizeof(buffer),
-      "Unimplemented instruction: at %p, last_pc=0x%" Px64 "\n",
-      instr, get_last_pc());
+           "Unimplemented instruction: at %p, last_pc=0x%" Px64 "\n", instr,
+           get_last_pc());
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   FATAL("Cannot continue execution after unimplemented instruction.");
@@ -1062,7 +1057,7 @@ uword Simulator::StackTop() const {
   // To be safe in potential stack underflows we leave some buffer above and
   // set the stack top.
   return StackBase() +
-      (OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer);
+         (OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer);
 }
 
 
@@ -1282,8 +1277,7 @@ uint32_t Simulator::CompareExchangeUint32(uint32_t* address,
 
 // Unsupported instructions use Format to print an error and stop execution.
 void Simulator::Format(Instr* instr, const char* format) {
-  OS::Print("Simulator found unsupported instruction:\n 0x%p: %s\n",
-            instr,
+  OS::Print("Simulator found unsupported instruction:\n 0x%p: %s\n", instr,
             format);
   UNIMPLEMENTED();
 }
@@ -1321,7 +1315,9 @@ void Simulator::SetNZFlagsX(int64_t val) {
 
 // Calculate C flag value for additions and subtractions.
 bool Simulator::CarryFromX(int64_t alu_out,
-                           int64_t left, int64_t right, bool addition) {
+                           int64_t left,
+                           int64_t right,
+                           bool addition) {
   if (addition) {
     return (((left & right) | ((left | right) & ~alu_out)) >> 63) != 0;
   } else {
@@ -1332,7 +1328,9 @@ bool Simulator::CarryFromX(int64_t alu_out,
 
 // Calculate V flag value for additions and subtractions.
 bool Simulator::OverflowFromX(int64_t alu_out,
-                              int64_t left, int64_t right, bool addition) {
+                              int64_t left,
+                              int64_t right,
+                              bool addition) {
   if (addition) {
     return (((alu_out ^ left) & (alu_out ^ right)) >> 63) != 0;
   } else {
@@ -1357,8 +1355,8 @@ void Simulator::DecodeMoveWide(Instr* instr) {
   const Register rd = instr->RdField();
   const int hw = instr->HWField();
   const int64_t shift = hw << 4;
-  const int64_t shifted_imm =
-      static_cast<int64_t>(instr->Imm16Field()) << shift;
+  const int64_t shifted_imm = static_cast<int64_t>(instr->Imm16Field())
+                              << shift;
 
   if (instr->SFField()) {
     if (instr->Bits(29, 2) == 0) {
@@ -1378,7 +1376,7 @@ void Simulator::DecodeMoveWide(Instr* instr) {
   } else if ((hw & 0x2) == 0) {
     if (instr->Bits(29, 2) == 0) {
       // Format(instr, "movn'sf 'rd, 'imm16 'hw");
-      set_wregister(rd, ~shifted_imm & kWRegMask,  instr->RdMode());
+      set_wregister(rd, ~shifted_imm & kWRegMask, instr->RdMode());
     } else if (instr->Bits(29, 2) == 2) {
       // Format(instr, "movz'sf 'rd, 'imm16 'hw");
       set_wregister(rd, shifted_imm & kWRegMask, instr->RdMode());
@@ -1438,7 +1436,8 @@ void Simulator::DecodeLogicalImm(Instr* instr) {
   const int op = instr->Bits(29, 2);
   const bool set_flags = op == 3;
   const int out_size = ((instr->SFField() == 0) && (instr->NField() == 0))
-                       ? kWRegSizeInBits : kXRegSizeInBits;
+                           ? kWRegSizeInBits
+                           : kXRegSizeInBits;
   const Register rn = instr->RnField();
   const Register rd = instr->RdField();
   const int64_t rn_val = get_register(rn, instr->RnMode());
@@ -1544,22 +1543,38 @@ bool Simulator::ConditionallyExecute(Instr* instr) {
     cond = instr->ConditionField();
   }
   switch (cond) {
-    case EQ: return z_flag_;
-    case NE: return !z_flag_;
-    case CS: return c_flag_;
-    case CC: return !c_flag_;
-    case MI: return n_flag_;
-    case PL: return !n_flag_;
-    case VS: return v_flag_;
-    case VC: return !v_flag_;
-    case HI: return c_flag_ && !z_flag_;
-    case LS: return !c_flag_ || z_flag_;
-    case GE: return n_flag_ == v_flag_;
-    case LT: return n_flag_ != v_flag_;
-    case GT: return !z_flag_ && (n_flag_ == v_flag_);
-    case LE: return z_flag_ || (n_flag_ != v_flag_);
-    case AL: return true;
-    default: UNREACHABLE();
+    case EQ:
+      return z_flag_;
+    case NE:
+      return !z_flag_;
+    case CS:
+      return c_flag_;
+    case CC:
+      return !c_flag_;
+    case MI:
+      return n_flag_;
+    case PL:
+      return !n_flag_;
+    case VS:
+      return v_flag_;
+    case VC:
+      return !v_flag_;
+    case HI:
+      return c_flag_ && !z_flag_;
+    case LS:
+      return !c_flag_ || z_flag_;
+    case GE:
+      return n_flag_ == v_flag_;
+    case LT:
+      return n_flag_ != v_flag_;
+    case GT:
+      return !z_flag_ && (n_flag_ == v_flag_);
+    case LE:
+      return z_flag_ || (n_flag_ != v_flag_);
+    case AL:
+      return true;
+    default:
+      UNREACHABLE();
   }
   return false;
 }
@@ -1582,14 +1597,24 @@ void Simulator::DecodeConditionalBranch(Instr* instr) {
 typedef void (*SimulatorRuntimeCall)(NativeArguments arguments);
 
 // Calls to leaf Dart runtime functions are based on this interface.
-typedef int64_t (*SimulatorLeafRuntimeCall)(
-    int64_t r0, int64_t r1, int64_t r2, int64_t r3,
-    int64_t r4, int64_t r5, int64_t r6, int64_t r7);
+typedef int64_t (*SimulatorLeafRuntimeCall)(int64_t r0,
+                                            int64_t r1,
+                                            int64_t r2,
+                                            int64_t r3,
+                                            int64_t r4,
+                                            int64_t r5,
+                                            int64_t r6,
+                                            int64_t r7);
 
 // Calls to leaf float Dart runtime functions are based on this interface.
-typedef double (*SimulatorLeafFloatRuntimeCall)(
-    double d0, double d1, double d2, double d3,
-    double d4, double d5, double d6, double d7);
+typedef double (*SimulatorLeafFloatRuntimeCall)(double d0,
+                                                double d1,
+                                                double d2,
+                                                double d3,
+                                                double d4,
+                                                double d5,
+                                                double d6,
+                                                double d7);
 
 // Calls to native Dart functions are based on this interface.
 typedef void (*SimulatorBootstrapNativeCall)(NativeArguments* arguments);
@@ -1635,7 +1660,7 @@ void Simulator::DoRedirectedCall(Instr* instr) {
       const int64_t r6 = get_register(R6);
       const int64_t r7 = get_register(R7);
       const int64_t res = target(r0, r1, r2, r3, r4, r5, r6, r7);
-      set_register(instr, R0, res);  // Set returned result from function.
+      set_register(instr, R0, res);      // Set returned result from function.
       set_register(instr, R1, icount_);  // Zap unused result register.
     } else if (redirection->call_kind() == kLeafFloatRuntimeCall) {
       ASSERT((0 <= redirection->argument_count()) &&
@@ -1865,8 +1890,8 @@ void Simulator::DecodeLoadStoreReg(Instr* instr) {
   const Register rt = instr->RtField();
   const VRegister vt = instr->VtField();
   const int64_t rn_val = get_register(rn, R31IsSP);
-  const uint32_t size =
-      (instr->Bit(26) == 1) ? ((instr->Bit(23) << 2) | instr->SzField())
+  const uint32_t size = (instr->Bit(26) == 1)
+                            ? ((instr->Bit(23) << 2) | instr->SzField())
                             : instr->SzField();
   uword address = 0;
   uword wb_address = 0;
@@ -1876,7 +1901,7 @@ void Simulator::DecodeLoadStoreReg(Instr* instr) {
     const uint32_t imm12 = static_cast<uint32_t>(instr->Imm12Field());
     const uint32_t offset = imm12 << size;
     address = rn_val + offset;
-  }  else if (instr->Bits(10, 2) == 0) {
+  } else if (instr->Bits(10, 2) == 0) {
     // addr = rn + signed 9-bit immediate offset.
     wb = false;
     const int64_t offset = static_cast<int64_t>(instr->SImm9Field());
@@ -1899,8 +1924,7 @@ void Simulator::DecodeLoadStoreReg(Instr* instr) {
     // addr = rn + (rm EXT optionally scaled by operand instruction size).
     const Register rm = instr->RmField();
     const Extend ext = instr->ExtendTypeField();
-    const uint8_t scale =
-        (ext == UXTX) && (instr->Bit(12) == 1) ? size : 0;
+    const uint8_t scale = (ext == UXTX) && (instr->Bit(12) == 1) ? size : 0;
     const int64_t rm_val = get_register(rm, R31IsZR);
     const int64_t offset = ExtendOperand(kXRegSizeInBits, rm_val, ext, scale);
     address = rn_val + offset;
@@ -2170,9 +2194,7 @@ void Simulator::DecodeLoadRegLiteral(Instr* instr) {
 
 
 void Simulator::DecodeLoadStoreExclusive(Instr* instr) {
-  if ((instr->Bit(23) != 0) ||
-      (instr->Bit(21) != 0) ||
-      (instr->Bit(15) != 0)) {
+  if ((instr->Bit(23) != 0) || (instr->Bit(21) != 0) || (instr->Bit(15) != 0)) {
     UNIMPLEMENTED();
   }
   const int32_t size = instr->Bits(30, 2);
@@ -2773,7 +2795,7 @@ void Simulator::DecodeSIMDCopy(Instr* instr) {
       // Format(instr, "vmovrd 'rd, 'vn'idx5");
       set_register(instr, rd, get_vregisterd(vn, idx5), R31IsZR);
     }
-  } else if ((Q == 1)  && (op == 0) && (imm4 == 0)) {
+  } else if ((Q == 1) && (op == 0) && (imm4 == 0)) {
     // Format(instr, "vdup'csz 'vd, 'vn'idx5");
     if (element_bytes == 4) {
       for (int i = 0; i < 4; i++) {
@@ -2984,9 +3006,12 @@ void Simulator::DecodeSIMDThreeSame(Instr* instr) {
 
 static float arm_reciprocal_sqrt_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-87.
-  if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
-  else if (a == 0.0) return kPosInfinity;
-  else if (isnan(a)) return a;
+  if (isinf(a) || (fabs(a) >= exp2f(126)))
+    return 0.0;
+  else if (a == 0.0)
+    return kPosInfinity;
+  else if (isnan(a))
+    return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
   uint64_t scaled;
@@ -3024,10 +3049,11 @@ static float arm_reciprocal_sqrt_estimate(float a) {
   // r in units of 1/256 rounded to nearest.
   int32_t s = static_cast<int>(256.0 * r + 0.5);
   double estimate = static_cast<double>(s) / 256.0;
-  ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+  ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = 0 : result_exp<7:0> : estimate<51:29>
-  int32_t result_bits = ((result_exp & 0xff) << 23) |
+  int32_t result_bits =
+      ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
@@ -3035,9 +3061,12 @@ static float arm_reciprocal_sqrt_estimate(float a) {
 
 static float arm_recip_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-85.
-  if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
-  else if (a == 0.0) return kPosInfinity;
-  else if (isnan(a)) return a;
+  if (isinf(a) || (fabs(a) >= exp2f(126)))
+    return 0.0;
+  else if (a == 0.0)
+    return kPosInfinity;
+  else if (isnan(a))
+    return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
   // scaled = '0011 1111 1110' : a<22:0> : Zeros(29)
@@ -3057,7 +3086,7 @@ static float arm_recip_estimate(float a) {
   // r in units of 1/256 rounded to nearest.
   int32_t s = static_cast<int32_t>(256.0 * r + 0.5);
   double estimate = static_cast<double>(s) / 256.0;
-  ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+  ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = sign : result_exp<7:0> : estimate<51:29>
   int32_t result_bits =
@@ -3217,8 +3246,9 @@ void Simulator::DecodeFPIntCvt(Instr* instr) {
     // Format(instr, "scvtfd'sf 'vd, 'rn");
     const int64_t rn_val64 = get_register(rn, instr->RnMode());
     const int32_t rn_val32 = get_wregister(rn, instr->RnMode());
-    const double vn_dbl = (instr->SFField() == 1) ?
-        static_cast<double>(rn_val64) : static_cast<double>(rn_val32);
+    const double vn_dbl = (instr->SFField() == 1)
+                              ? static_cast<double>(rn_val64)
+                              : static_cast<double>(rn_val32);
     set_vregisterd(vd, 0, bit_cast<int64_t, double>(vn_dbl));
     set_vregisterd(vd, 1, 0);
   } else if (instr->Bits(16, 5) == 6) {
@@ -3605,10 +3635,10 @@ void Simulator::Longjmp(uword pc,
   set_register(NULL, kExceptionObjectReg, bit_cast<int64_t>(raw_exception));
   set_register(NULL, kStackTraceObjectReg, bit_cast<int64_t>(raw_stacktrace));
   // Restore pool pointer.
-  int64_t code = *reinterpret_cast<int64_t*>(
-      fp + kPcMarkerSlotFromFp * kWordSize);
-  int64_t pp = *reinterpret_cast<int64_t*>(
-      code + Code::object_pool_offset() - kHeapObjectTag);
+  int64_t code =
+      *reinterpret_cast<int64_t*>(fp + kPcMarkerSlotFromFp * kWordSize);
+  int64_t pp = *reinterpret_cast<int64_t*>(code + Code::object_pool_offset() -
+                                           kHeapObjectTag);
   pp -= kHeapObjectTag;  // In the PP register, the pool pointer is untagged.
   set_register(NULL, CODE_REG, code);
   set_register(NULL, PP, pp);