clang-format runtime/vm

runtime/vm/simulator_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <setjmp.h>  // NOLINT
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
 
 // Only build the simulator if not compiling for real ARM hardware.
 #if defined(USING_SIMULATOR)
 
 #include "vm/simulator.h"
 
 #include "vm/assembler.h"
 #include "vm/constants_arm64.h"
 #include "vm/disassembler.h"
 #include "vm/lockers.h"
 #include "vm/native_arguments.h"
 #include "vm/stack_frame.h"
 #include "vm/os_thread.h"
 
 namespace dart {
 
-DEFINE_FLAG(uint64_t, trace_sim_after, ULLONG_MAX,
+DEFINE_FLAG(uint64_t,
+            trace_sim_after,
+            ULLONG_MAX,
             "Trace simulator execution after instruction count reached.");
-DEFINE_FLAG(uint64_t, stop_sim_at, ULLONG_MAX,
+DEFINE_FLAG(uint64_t,
+            stop_sim_at,
+            ULLONG_MAX,
             "Instruction address or instruction count to stop simulator at.");
 
 
 // This macro provides a platform independent use of sscanf. The reason for
 // SScanF not being implemented in a platform independent way through
 // OS in the same way as SNPrint is that the Windows C Run-Time
 // Library does not provide vsscanf.
 #define SScanF sscanf  // NOLINT
 
 
@@ skipping 50 matching lines @@
  private:
   Simulator* sim_;
 
   bool GetValue(char* desc, uint64_t* value);
   bool GetSValue(char* desc, uint32_t* value);
   bool GetDValue(char* desc, uint64_t* value);
   bool GetQValue(char* desc, simd_value_t* value);
 
   static TokenPosition GetApproximateTokenIndex(const Code& code, uword pc);
 
-  static void PrintDartFrame(uword pc, uword fp, uword sp,
+  static void PrintDartFrame(uword pc,
+                             uword fp,
+                             uword sp,
                              const Function& function,
                              TokenPosition token_pos,
                              bool is_optimized,
                              bool is_inlined);
   void PrintBacktrace();
 
   // Set or delete a breakpoint. Returns true if successful.
   bool SetBreakpoint(Instr* breakpc);
   bool DeleteBreakpoint(Instr* breakpc);
 
   // Undo and redo all breakpoints. This is needed to bracket disassembly and
   // execution to skip past breakpoints when run from the debugger.
   void UndoBreakpoints();
   void RedoBreakpoints();
 };
 
 
 SimulatorDebugger::SimulatorDebugger(Simulator* sim) {
   sim_ = sim;
 }
 
 
-SimulatorDebugger::~SimulatorDebugger() {
-}
+SimulatorDebugger::~SimulatorDebugger() {}
 
 
 void SimulatorDebugger::Stop(Instr* instr, const char* message) {
   OS::Print("Simulator hit %s\n", message);
   Debug();
 }
 
 
 static Register LookupCpuRegisterByName(const char* name) {
   static const char* kNames[] = {
-      "r0",  "r1",  "r2",  "r3",
-      "r4",  "r5",  "r6",  "r7",
-      "r8",  "r9",  "r10", "r11",
-      "r12", "r13", "r14", "r15",
-      "r16", "r17", "r18", "r19",
-      "r20", "r21", "r22", "r23",
-      "r24", "r25", "r26", "r27",
-      "r28", "r29", "r30",
+      "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
+      "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
+      "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+      "r24", "r25", "r26", "r27", "r28", "r29", "r30",
 
-      "ip0", "ip1", "pp",  "ctx", "fp",  "lr",  "sp", "zr",
+      "ip0", "ip1", "pp",  "ctx", "fp",  "lr",  "sp",  "zr",
   };
   static const Register kRegisters[] = {
-      R0,  R1,  R2,  R3,  R4,  R5,  R6,  R7,
-      R8,  R9,  R10, R11, R12, R13, R14, R15,
-      R16, R17, R18, R19, R20, R21, R22, R23,
-      R24, R25, R26, R27, R28, R29, R30,
+      R0,  R1,  R2,  R3,  R4,  R5,  R6,  R7,  R8,  R9,  R10,
+      R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21,
+      R22, R23, R24, R25, R26, R27, R28, R29, R30,
 
-      IP0, IP1, PP, CTX, FP, LR, R31, ZR,
+      IP0, IP1, PP,  CTX, FP,  LR,  R31, ZR,
   };
   ASSERT(ARRAY_SIZE(kNames) == ARRAY_SIZE(kRegisters));
   for (unsigned i = 0; i < ARRAY_SIZE(kNames); i++) {
     if (strcmp(kNames[i], name) == 0) {
       return kRegisters[i];
     }
   }
   return kNoRegister;
 }
 
@@ skipping 94 matching lines @@
       }
       *value = *(reinterpret_cast<simd_value_t*>(addr));
       return true;
     }
   }
   return false;
 }
 
 
 TokenPosition SimulatorDebugger::GetApproximateTokenIndex(const Code& code,
-                                                            uword pc) {
+                                                          uword pc) {
   TokenPosition token_pos = TokenPosition::kNoSource;
   uword pc_offset = pc - code.PayloadStart();
   const PcDescriptors& descriptors =
       PcDescriptors::Handle(code.pc_descriptors());
   PcDescriptors::Iterator iter(descriptors, RawPcDescriptors::kAnyKind);
   while (iter.MoveNext()) {
     if (iter.PcOffset() == pc_offset) {
       return iter.TokenPos();
     } else if (!token_pos.IsReal() && (iter.PcOffset() > pc_offset)) {
       token_pos = iter.TokenPos();
     }
   }
   return token_pos;
 }
 
 
-void SimulatorDebugger::PrintDartFrame(uword pc, uword fp, uword sp,
+void SimulatorDebugger::PrintDartFrame(uword pc,
+                                       uword fp,
+                                       uword sp,
                                        const Function& function,
                                        TokenPosition token_pos,
                                        bool is_optimized,
                                        bool is_inlined) {
   const Script& script = Script::Handle(function.script());
   const String& func_name = String::Handle(function.QualifiedScrubbedName());
   const String& url = String::Handle(script.url());
   intptr_t line = -1;
   intptr_t column = -1;
   if (token_pos.IsReal()) {
     script.GetTokenLocation(token_pos, &line, &column);
   }
-  OS::Print("pc=0x%" Px " fp=0x%" Px " sp=0x%" Px " %s%s (%s:%" Pd
-            ":%" Pd ")\n",
-            pc, fp, sp,
-            is_optimized ? (is_inlined ? "inlined " : "optimized ") : "",
-            func_name.ToCString(),
-            url.ToCString(),
-            line, column);
+  OS::Print(
+      "pc=0x%" Px " fp=0x%" Px " sp=0x%" Px " %s%s (%s:%" Pd ":%" Pd ")\n", pc,
+      fp, sp, is_optimized ? (is_inlined ? "inlined " : "optimized ") : "",
+      func_name.ToCString(), url.ToCString(), line, column);
 }
 
 
 void SimulatorDebugger::PrintBacktrace() {
-  StackFrameIterator frames(sim_->get_register(FP),
-                            sim_->get_register(SP),
+  StackFrameIterator frames(sim_->get_register(FP), sim_->get_register(SP),
                             sim_->get_pc(),
                             StackFrameIterator::kDontValidateFrames);
   StackFrame* frame = frames.NextFrame();
   ASSERT(frame != NULL);
   Function& function = Function::Handle();
   Function& inlined_function = Function::Handle();
   Code& code = Code::Handle();
   Code& unoptimized_code = Code::Handle();
   while (frame != NULL) {
     if (frame->IsDartFrame()) {
       code = frame->LookupDartCode();
       function = code.function();
       if (code.is_optimized()) {
         // For optimized frames, extract all the inlined functions if any
         // into the stack trace.
         InlinedFunctionsIterator it(code, frame->pc());
         while (!it.Done()) {
           // Print each inlined frame with its pc in the corresponding
           // unoptimized frame.
           inlined_function = it.function();
           unoptimized_code = it.code();
           uword unoptimized_pc = it.pc();
           it.Advance();
           if (!it.Done()) {
-            PrintDartFrame(unoptimized_pc, frame->fp(), frame->sp(),
-                           inlined_function,
-                           GetApproximateTokenIndex(unoptimized_code,
-                                                    unoptimized_pc),
-                           true, true);
+            PrintDartFrame(
+                unoptimized_pc, frame->fp(), frame->sp(), inlined_function,
+                GetApproximateTokenIndex(unoptimized_code, unoptimized_pc),
+                true, true);
           }
         }
         // Print the optimized inlining frame below.
       }
-      PrintDartFrame(frame->pc(), frame->fp(), frame->sp(),
-                     function,
+      PrintDartFrame(frame->pc(), frame->fp(), frame->sp(), function,
                      GetApproximateTokenIndex(code, frame->pc()),
                      code.is_optimized(), false);
     } else {
       OS::Print("pc=0x%" Px " fp=0x%" Px " sp=0x%" Px " %s frame\n",
                 frame->pc(), frame->fp(), frame->sp(),
-                frame->IsEntryFrame() ? "entry" :
-                    frame->IsExitFrame() ? "exit" :
-                        frame->IsStubFrame() ? "stub" : "invalid");
+                frame->IsEntryFrame()
+                    ? "entry"
+                    : frame->IsExitFrame()
+                          ? "exit"
+                          : frame->IsStubFrame() ? "stub" : "invalid");
     }
     frame = frames.NextFrame();
   }
 }
 
 
 bool SimulatorDebugger::SetBreakpoint(Instr* breakpc) {
   // Check if a breakpoint can be set. If not return without any side-effects.
   if (sim_->break_pc_ != NULL) {
     return false;
@@ skipping 74 matching lines @@
       FATAL("ReadLine failed");
     } else {
       // Use sscanf to parse the individual parts of the command line. At the
       // moment no command expects more than two parameters.
       int args = SScanF(line,
                         "%" XSTR(COMMAND_SIZE) "s "
                         "%" XSTR(ARG_SIZE) "s "
                         "%" XSTR(ARG_SIZE) "s",
                         cmd, arg1, arg2);
       if ((strcmp(cmd, "h") == 0) || (strcmp(cmd, "help") == 0)) {
-        OS::Print("c/cont -- continue execution\n"
-                  "disasm -- disassemble instrs at current pc location\n"
-                  "  other variants are:\n"
-                  "    disasm <address>\n"
-                  "    disasm <address> <number_of_instructions>\n"
-                  "  by default 10 instrs are disassembled\n"
-                  "del -- delete breakpoints\n"
-                  "flags -- print flag values\n"
-                  "gdb -- transfer control to gdb\n"
-                  "h/help -- print this help string\n"
-                  "break <address> -- set break point at specified address\n"
-                  "p/print <reg or icount or value or *addr> -- print integer\n"
-                  "pf/printfloat <vreg or *addr> --print float value\n"
-                  "pd/printdouble <vreg or *addr> -- print double value\n"
-                  "pq/printquad <vreg or *addr> -- print vector register\n"
-                  "po/printobject <*reg or *addr> -- print object\n"
-                  "si/stepi -- single step an instruction\n"
-                  "trace -- toggle execution tracing mode\n"
-                  "bt -- print backtrace\n"
-                  "unstop -- if current pc is a stop instr make it a nop\n"
-                  "q/quit -- Quit the debugger and exit the program\n");
+        OS::Print(
+            "c/cont -- continue execution\n"
+            "disasm -- disassemble instrs at current pc location\n"
+            "  other variants are:\n"
+            "    disasm <address>\n"
+            "    disasm <address> <number_of_instructions>\n"
+            "  by default 10 instrs are disassembled\n"
+            "del -- delete breakpoints\n"
+            "flags -- print flag values\n"
+            "gdb -- transfer control to gdb\n"
+            "h/help -- print this help string\n"
+            "break <address> -- set break point at specified address\n"
+            "p/print <reg or icount or value or *addr> -- print integer\n"
+            "pf/printfloat <vreg or *addr> --print float value\n"
+            "pd/printdouble <vreg or *addr> -- print double value\n"
+            "pq/printquad <vreg or *addr> -- print vector register\n"
+            "po/printobject <*reg or *addr> -- print object\n"
+            "si/stepi -- single step an instruction\n"
+            "trace -- toggle execution tracing mode\n"
+            "bt -- print backtrace\n"
+            "unstop -- if current pc is a stop instr make it a nop\n"
+            "q/quit -- Quit the debugger and exit the program\n");
       } else if ((strcmp(cmd, "quit") == 0) || (strcmp(cmd, "q") == 0)) {
         OS::Print("Quitting\n");
         OS::Exit(0);
       } else if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) {
         sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc()));
       } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) {
         // Execute the one instruction we broke at with breakpoints disabled.
         sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc()));
         // Leave the debugger shell.
         done = true;
       } else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) {
         if (args == 2) {
           uint64_t value;
           if (strcmp(arg1, "icount") == 0) {
             value = sim_->get_icount();
             OS::Print("icount: %" Pu64 " 0x%" Px64 "\n", value, value);
           } else if (GetValue(arg1, &value)) {
             OS::Print("%s: %" Pu64 " 0x%" Px64 "\n", arg1, value, value);
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
         } else {
           OS::Print("print <reg or icount or value or *addr>\n");
         }
-      } else if ((strcmp(cmd, "pf") == 0) ||
-                 (strcmp(cmd, "printfloat") == 0)) {
+      } else if ((strcmp(cmd, "pf") == 0) || (strcmp(cmd, "printfloat") == 0)) {
         if (args == 2) {
           uint32_t value;
           if (GetSValue(arg1, &value)) {
             float svalue = bit_cast<float, uint32_t>(value);
-            OS::Print("%s: %d 0x%x %.8g\n",
-                arg1, value, value, svalue);
+            OS::Print("%s: %d 0x%x %.8g\n", arg1, value, value, svalue);
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
         } else {
           OS::Print("printfloat <vreg or *addr>\n");
         }
       } else if ((strcmp(cmd, "pd") == 0) ||
                  (strcmp(cmd, "printdouble") == 0)) {
         if (args == 2) {
           uint64_t long_value;
           if (GetDValue(arg1, &long_value)) {
             double dvalue = bit_cast<double, uint64_t>(long_value);
-            OS::Print("%s: %" Pu64 " 0x%" Px64 " %.8g\n",
-                arg1, long_value, long_value, dvalue);
+            OS::Print("%s: %" Pu64 " 0x%" Px64 " %.8g\n", arg1, long_value,
+                      long_value, dvalue);
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
         } else {
           OS::Print("printdouble <vreg or *addr>\n");
         }
-      } else if ((strcmp(cmd, "pq") == 0) ||
-                 (strcmp(cmd, "printquad") == 0)) {
+      } else if ((strcmp(cmd, "pq") == 0) || (strcmp(cmd, "printquad") == 0)) {
         if (args == 2) {
           simd_value_t quad_value;
           if (GetQValue(arg1, &quad_value)) {
             const int64_t d0 = quad_value.bits.i64[0];
             const int64_t d1 = quad_value.bits.i64[1];
             const double dval0 = bit_cast<double, int64_t>(d0);
             const double dval1 = bit_cast<double, int64_t>(d1);
             const int32_t s0 = quad_value.bits.i32[0];
             const int32_t s1 = quad_value.bits.i32[1];
             const int32_t s2 = quad_value.bits.i32[2];
@@ skipping 17 matching lines @@
       } else if ((strcmp(cmd, "po") == 0) ||
                  (strcmp(cmd, "printobject") == 0)) {
         if (args == 2) {
           uint64_t value;
           // Make the dereferencing '*' optional.
           if (((arg1[0] == '*') && GetValue(arg1 + 1, &value)) ||
               GetValue(arg1, &value)) {
             if (Isolate::Current()->heap()->Contains(value)) {
               OS::Print("%s: \n", arg1);
 #if defined(DEBUG)
-              const Object& obj = Object::Handle(
-                  reinterpret_cast<RawObject*>(value));
+              const Object& obj =
+                  Object::Handle(reinterpret_cast<RawObject*>(value));
               obj.Print();
 #endif  // defined(DEBUG)
             } else {
               OS::Print("0x%" Px64 " is not an object reference\n", value);
             }
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
         } else {
           OS::Print("printobject <*reg or *addr>\n");
@@ skipping 110 matching lines @@
   OS::Print("%s", prompt);
   while (keep_going) {
     if (fgets(line_buf, sizeof(line_buf), stdin) == NULL) {
       // fgets got an error. Just give up.
       if (result != NULL) {
         delete[] result;
       }
       return NULL;
     }
     intptr_t len = strlen(line_buf);
-    if (len > 1 &&
-        line_buf[len - 2] == '\\' &&
-        line_buf[len - 1] == '\n') {
+    if (len > 1 && line_buf[len - 2] == '\\' && line_buf[len - 1] == '\n') {
       // When we read a line that ends with a "\" we remove the escape and
       // append the remainder.
       line_buf[len - 2] = '\n';
       line_buf[len - 1] = 0;
       len -= 1;
     } else if ((len > 0) && (line_buf[len - 1] == '\n')) {
       // Since we read a new line we are done reading the line. This
       // will exit the loop after copying this buffer into the result.
       keep_going = false;
     }
@@ skipping 25 matching lines @@
     offset += len;
   }
   ASSERT(result != NULL);
   result[offset] = '\0';
   return result;
 }
 
 
 // Synchronization primitives support.
 Mutex* Simulator::exclusive_access_lock_ = NULL;
-Simulator::AddressTag Simulator::exclusive_access_state_[kNumAddressTags] =
-    {{NULL, 0}};
+Simulator::AddressTag Simulator::exclusive_access_state_[kNumAddressTags] = {
+    {NULL, 0}};
 int Simulator::next_address_tag_ = 0;
 
 
 void Simulator::InitOnce() {
   // Setup exclusive access state lock.
   exclusive_access_lock_ = new Mutex();
 }
 
 
 Simulator::Simulator() {
   // Setup simulator support first. Some of this information is needed to
   // setup the architecture state.
   // We allocate the stack here, the size is computed as the sum of
   // the size specified by the user and the buffer space needed for
   // handling stack overflow exceptions. To be safe in potential
   // stack underflows we also add some underflow buffer space.
-  stack_ = new char[(OSThread::GetSpecifiedStackSize() +
-                     OSThread::kStackSizeBuffer +
-                     kSimulatorStackUnderflowSize)];
+  stack_ =
+      new char[(OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer +
+                kSimulatorStackUnderflowSize)];
   pc_modified_ = false;
   icount_ = 0;
   break_pc_ = NULL;
   break_instr_ = 0;
   last_setjmp_buffer_ = NULL;
   top_exit_frame_info_ = 0;
 
   // Setup architecture state.
   // All registers are initialized to zero to start with.
   for (int i = 0; i < kNumberOfCpuRegisters; i++) {
@@ skipping 81 matching lines @@
       : external_function_(external_function),
         call_kind_(call_kind),
         argument_count_(argument_count),
         hlt_instruction_(Instr::kSimulatorRedirectInstruction),
         next_(list_) {
     // Atomically prepend this element to the front of the global list.
     // Note: Since elements are never removed, there is no ABA issue.
     Redirection* list_head = list_;
     do {
       next_ = list_head;
-      list_head = reinterpret_cast<Redirection*>(
-          AtomicOperations::CompareAndSwapWord(
-              reinterpret_cast<uword*>(&list_),
-              reinterpret_cast<uword>(next_),
+      list_head =
+          reinterpret_cast<Redirection*>(AtomicOperations::CompareAndSwapWord(
+              reinterpret_cast<uword*>(&list_), reinterpret_cast<uword>(next_),
               reinterpret_cast<uword>(this)));
     } while (list_head != next_);
   }
 
   uword external_function_;
   Simulator::CallKind call_kind_;
   int argument_count_;
   uint32_t hlt_instruction_;
   Redirection* next_;
   static Redirection* list_;
@@ skipping 22 matching lines @@
   Simulator* simulator = Isolate::Current()->simulator();
   if (simulator == NULL) {
     simulator = new Simulator();
     Isolate::Current()->set_simulator(simulator);
   }
   return simulator;
 }
 
 
 // Sets the register in the architecture state.
-void Simulator::set_register(
-    Instr* instr, Register reg, int64_t value, R31Type r31t) {
+void Simulator::set_register(Instr* instr,
+                             Register reg,
+                             int64_t value,
+                             R31Type r31t) {
   // Register is in range.
   ASSERT((reg >= 0) && (reg < kNumberOfCpuRegisters));
   ASSERT(instr == NULL || reg != R18);  // R18 is globally reserved on iOS.
   if ((reg != R31) || (r31t != R31IsZR)) {
     registers_[reg] = value;
     // If we're setting CSP, make sure it is 16-byte aligned. In truth, CSP
     // can store addresses that are not 16-byte aligned, but loads and stores
     // are not allowed through CSP when it is not aligned. Thus, this check is
     // more conservative that necessary. However, it will likely be more
     // useful to find the program locations where CSP is set to a bad value,
@@ skipping 95 matching lines @@
 
 int64_t Simulator::get_last_pc() const {
   return last_pc_;
 }
 
 
 void Simulator::HandleIllegalAccess(uword addr, Instr* instr) {
   uword fault_pc = get_pc();
   uword last_pc = get_last_pc();
   char buffer[128];
-  snprintf(buffer, sizeof(buffer),
-      "illegal memory access at 0x%" Px ", pc=0x%" Px ", last_pc=0x%" Px"\n",
-      addr, fault_pc, last_pc);
+  snprintf(buffer, sizeof(buffer), "illegal memory access at 0x%" Px
+                                   ", pc=0x%" Px ", last_pc=0x%" Px "\n",
+           addr, fault_pc, last_pc);
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   // The debugger will return control in non-interactive mode.
   FATAL("Cannot continue execution after illegal memory access.");
 }
 
 
 // The ARMv8 manual advises that an unaligned access may generate a fault,
 // and if not, will likely take a number of additional cycles to execute,
 // so let's just not generate any.
 void Simulator::UnalignedAccess(const char* msg, uword addr, Instr* instr) {
   char buffer[128];
-  snprintf(buffer, sizeof(buffer),
-           "unaligned %s at 0x%" Px ", pc=%p\n", msg, addr, instr);
+  snprintf(buffer, sizeof(buffer), "unaligned %s at 0x%" Px ", pc=%p\n", msg,
+           addr, instr);
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   // The debugger will not be able to single step past this instruction, but
   // it will be possible to disassemble the code and inspect registers.
   FATAL("Cannot continue execution after unaligned access.");
 }
 
 
 void Simulator::UnimplementedInstruction(Instr* instr) {
   char buffer[128];
   snprintf(buffer, sizeof(buffer),
-      "Unimplemented instruction: at %p, last_pc=0x%" Px64 "\n",
-      instr, get_last_pc());
+           "Unimplemented instruction: at %p, last_pc=0x%" Px64 "\n", instr,
+           get_last_pc());
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   FATAL("Cannot continue execution after unimplemented instruction.");
 }
 
 
 // Returns the top of the stack area to enable checking for stack pointer
 // validity.
 uword Simulator::StackTop() const {
   // To be safe in potential stack underflows we leave some buffer above and
   // set the stack top.
   return StackBase() +
-      (OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer);
+         (OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer);
 }
 
 
 bool Simulator::IsTracingExecution() const {
   return icount_ > FLAG_trace_sim_after;
 }
 
 
 intptr_t Simulator::ReadX(uword addr, Instr* instr) {
   if ((addr & 7) == 0) {
@@ skipping 199 matching lines @@
   } else {
     // Same effect on exclusive access state as an LDREX.
     SetExclusiveAccess(reinterpret_cast<uword>(address));
   }
   return value;
 }
 
 
 // Unsupported instructions use Format to print an error and stop execution.
 void Simulator::Format(Instr* instr, const char* format) {
-  OS::Print("Simulator found unsupported instruction:\n 0x%p: %s\n",
-            instr,
+  OS::Print("Simulator found unsupported instruction:\n 0x%p: %s\n", instr,
             format);
   UNIMPLEMENTED();
 }
 
 
 // Calculate and set the Negative and Zero flags.
 void Simulator::SetNZFlagsW(int32_t val) {
   n_flag_ = (val < 0);
   z_flag_ = (val == 0);
 }
@@ skipping 17 matching lines @@
 
 // Calculate and set the Negative and Zero flags.
 void Simulator::SetNZFlagsX(int64_t val) {
   n_flag_ = (val < 0);
   z_flag_ = (val == 0);
 }
 
 
 // Calculate C flag value for additions and subtractions.
 bool Simulator::CarryFromX(int64_t alu_out,
-                           int64_t left, int64_t right, bool addition) {
+                           int64_t left,
+                           int64_t right,
+                           bool addition) {
   if (addition) {
     return (((left & right) | ((left | right) & ~alu_out)) >> 63) != 0;
   } else {
     return (((~left & right) | ((~left | right) & alu_out)) >> 63) == 0;
   }
 }
 
 
 // Calculate V flag value for additions and subtractions.
 bool Simulator::OverflowFromX(int64_t alu_out,
-                              int64_t left, int64_t right, bool addition) {
+                              int64_t left,
+                              int64_t right,
+                              bool addition) {
   if (addition) {
     return (((alu_out ^ left) & (alu_out ^ right)) >> 63) != 0;
   } else {
     return (((left ^ right) & (alu_out ^ left)) >> 63) != 0;
   }
 }
 
 
 // Set the Carry flag.
 void Simulator::SetCFlag(bool val) {
   c_flag_ = val;
 }
 
 
 // Set the oVerflow flag.
 void Simulator::SetVFlag(bool val) {
   v_flag_ = val;
 }
 
 
 void Simulator::DecodeMoveWide(Instr* instr) {
   const Register rd = instr->RdField();
   const int hw = instr->HWField();
   const int64_t shift = hw << 4;
-  const int64_t shifted_imm =
-      static_cast<int64_t>(instr->Imm16Field()) << shift;
+  const int64_t shifted_imm = static_cast<int64_t>(instr->Imm16Field())
+                              << shift;
 
   if (instr->SFField()) {
     if (instr->Bits(29, 2) == 0) {
       // Format(instr, "movn'sf 'rd, 'imm16 'hw");
       set_register(instr, rd, ~shifted_imm, instr->RdMode());
     } else if (instr->Bits(29, 2) == 2) {
       // Format(instr, "movz'sf 'rd, 'imm16 'hw");
       set_register(instr, rd, shifted_imm, instr->RdMode());
     } else if (instr->Bits(29, 2) == 3) {
       // Format(instr, "movk'sf 'rd, 'imm16 'hw");
       const int64_t rd_val = get_register(rd, instr->RdMode());
       const int64_t result = (rd_val & ~(0xffffL << shift)) | shifted_imm;
       set_register(instr, rd, result, instr->RdMode());
     } else {
       UnimplementedInstruction(instr);
     }
   } else if ((hw & 0x2) == 0) {
     if (instr->Bits(29, 2) == 0) {
       // Format(instr, "movn'sf 'rd, 'imm16 'hw");
-      set_wregister(rd, ~shifted_imm & kWRegMask,  instr->RdMode());
+      set_wregister(rd, ~shifted_imm & kWRegMask, instr->RdMode());
     } else if (instr->Bits(29, 2) == 2) {
       // Format(instr, "movz'sf 'rd, 'imm16 'hw");
       set_wregister(rd, shifted_imm & kWRegMask, instr->RdMode());
     } else if (instr->Bits(29, 2) == 3) {
       // Format(instr, "movk'sf 'rd, 'imm16 'hw");
       const int32_t rd_val = get_wregister(rd, instr->RdMode());
       const int32_t result = (rd_val & ~(0xffffL << shift)) | shifted_imm;
       set_wregister(rd, result, instr->RdMode());
     } else {
       UnimplementedInstruction(instr);
@@ skipping 39 matching lines @@
       SetVFlag(OverflowFromW(rn_val, imm, carry_in));
     }
   }
 }
 
 
 void Simulator::DecodeLogicalImm(Instr* instr) {
   const int op = instr->Bits(29, 2);
   const bool set_flags = op == 3;
   const int out_size = ((instr->SFField() == 0) && (instr->NField() == 0))
-                       ? kWRegSizeInBits : kXRegSizeInBits;
+                           ? kWRegSizeInBits
+                           : kXRegSizeInBits;
   const Register rn = instr->RnField();
   const Register rd = instr->RdField();
   const int64_t rn_val = get_register(rn, instr->RnMode());
   const uint64_t imm = instr->ImmLogical();
   if (imm == 0) {
     UnimplementedInstruction(instr);
   }
 
   int64_t alu_out = 0;
   switch (op) {
@@ skipping 85 matching lines @@
 
 
 bool Simulator::ConditionallyExecute(Instr* instr) {
   Condition cond;
   if (instr->IsConditionalSelectOp()) {
     cond = instr->SelectConditionField();
   } else {
     cond = instr->ConditionField();
   }
   switch (cond) {
-    case EQ: return z_flag_;
-    case NE: return !z_flag_;
-    case CS: return c_flag_;
-    case CC: return !c_flag_;
-    case MI: return n_flag_;
-    case PL: return !n_flag_;
-    case VS: return v_flag_;
-    case VC: return !v_flag_;
-    case HI: return c_flag_ && !z_flag_;
-    case LS: return !c_flag_ || z_flag_;
-    case GE: return n_flag_ == v_flag_;
-    case LT: return n_flag_ != v_flag_;
-    case GT: return !z_flag_ && (n_flag_ == v_flag_);
-    case LE: return z_flag_ || (n_flag_ != v_flag_);
-    case AL: return true;
-    default: UNREACHABLE();
+    case EQ:
+      return z_flag_;
+    case NE:
+      return !z_flag_;
+    case CS:
+      return c_flag_;
+    case CC:
+      return !c_flag_;
+    case MI:
+      return n_flag_;
+    case PL:
+      return !n_flag_;
+    case VS:
+      return v_flag_;
+    case VC:
+      return !v_flag_;
+    case HI:
+      return c_flag_ && !z_flag_;
+    case LS:
+      return !c_flag_ || z_flag_;
+    case GE:
+      return n_flag_ == v_flag_;
+    case LT:
+      return n_flag_ != v_flag_;
+    case GT:
+      return !z_flag_ && (n_flag_ == v_flag_);
+    case LE:
+      return z_flag_ || (n_flag_ != v_flag_);
+    case AL:
+      return true;
+    default:
+      UNREACHABLE();
   }
   return false;
 }
 
 
 void Simulator::DecodeConditionalBranch(Instr* instr) {
   // Format(instr, "b'cond 'dest19");
   if ((instr->Bit(24) != 0) || (instr->Bit(4) != 0)) {
     UnimplementedInstruction(instr);
   }
   const int64_t imm19 = instr->SImm19Field();
   const int64_t dest = get_pc() + (imm19 << 2);
   if (ConditionallyExecute(instr)) {
     set_pc(dest);
   }
 }
 
 
 // Calls into the Dart runtime are based on this interface.
 typedef void (*SimulatorRuntimeCall)(NativeArguments arguments);
 
 // Calls to leaf Dart runtime functions are based on this interface.
-typedef int64_t (*SimulatorLeafRuntimeCall)(
-    int64_t r0, int64_t r1, int64_t r2, int64_t r3,
-    int64_t r4, int64_t r5, int64_t r6, int64_t r7);
+typedef int64_t (*SimulatorLeafRuntimeCall)(int64_t r0,
+                                            int64_t r1,
+                                            int64_t r2,
+                                            int64_t r3,
+                                            int64_t r4,
+                                            int64_t r5,
+                                            int64_t r6,
+                                            int64_t r7);
 
 // Calls to leaf float Dart runtime functions are based on this interface.
-typedef double (*SimulatorLeafFloatRuntimeCall)(
-    double d0, double d1, double d2, double d3,
-    double d4, double d5, double d6, double d7);
+typedef double (*SimulatorLeafFloatRuntimeCall)(double d0,
+                                                double d1,
+                                                double d2,
+                                                double d3,
+                                                double d4,
+                                                double d5,
+                                                double d6,
+                                                double d7);
 
 // Calls to native Dart functions are based on this interface.
 typedef void (*SimulatorBootstrapNativeCall)(NativeArguments* arguments);
 typedef void (*SimulatorNativeCall)(NativeArguments* arguments, uword target);
 
 
 void Simulator::DoRedirectedCall(Instr* instr) {
   SimulatorSetjmpBuffer buffer(this);
   if (!setjmp(buffer.buffer_)) {
     int64_t saved_lr = get_register(LR);
@@ skipping 25 matching lines @@
           reinterpret_cast<SimulatorLeafRuntimeCall>(external);
       const int64_t r0 = get_register(R0);
       const int64_t r1 = get_register(R1);
       const int64_t r2 = get_register(R2);
       const int64_t r3 = get_register(R3);
       const int64_t r4 = get_register(R4);
       const int64_t r5 = get_register(R5);
       const int64_t r6 = get_register(R6);
       const int64_t r7 = get_register(R7);
       const int64_t res = target(r0, r1, r2, r3, r4, r5, r6, r7);
-      set_register(instr, R0, res);  // Set returned result from function.
+      set_register(instr, R0, res);      // Set returned result from function.
       set_register(instr, R1, icount_);  // Zap unused result register.
     } else if (redirection->call_kind() == kLeafFloatRuntimeCall) {
       ASSERT((0 <= redirection->argument_count()) &&
              (redirection->argument_count() <= 8));
       SimulatorLeafFloatRuntimeCall target =
           reinterpret_cast<SimulatorLeafFloatRuntimeCall>(external);
       const double d0 = bit_cast<double, int64_t>(get_vregisterd(V0, 0));
       const double d1 = bit_cast<double, int64_t>(get_vregisterd(V1, 0));
       const double d2 = bit_cast<double, int64_t>(get_vregisterd(V2, 0));
       const double d3 = bit_cast<double, int64_t>(get_vregisterd(V3, 0));
@@ skipping 209 matching lines @@
   }
 }
 
 
 void Simulator::DecodeLoadStoreReg(Instr* instr) {
   // Calculate the address.
   const Register rn = instr->RnField();
   const Register rt = instr->RtField();
   const VRegister vt = instr->VtField();
   const int64_t rn_val = get_register(rn, R31IsSP);
-  const uint32_t size =
-      (instr->Bit(26) == 1) ? ((instr->Bit(23) << 2) | instr->SzField())
+  const uint32_t size = (instr->Bit(26) == 1)
+                            ? ((instr->Bit(23) << 2) | instr->SzField())
                             : instr->SzField();
   uword address = 0;
   uword wb_address = 0;
   bool wb = false;
   if (instr->Bit(24) == 1) {
     // addr = rn + scaled unsigned 12-bit immediate offset.
     const uint32_t imm12 = static_cast<uint32_t>(instr->Imm12Field());
     const uint32_t offset = imm12 << size;
     address = rn_val + offset;
-  }  else if (instr->Bits(10, 2) == 0) {
+  } else if (instr->Bits(10, 2) == 0) {
     // addr = rn + signed 9-bit immediate offset.
     wb = false;
     const int64_t offset = static_cast<int64_t>(instr->SImm9Field());
     address = rn_val + offset;
     wb_address = rn_val;
   } else if (instr->Bit(10) == 1) {
     // addr = rn + signed 9-bit immediate offset.
     wb = true;
     const int64_t offset = static_cast<int64_t>(instr->SImm9Field());
     if (instr->Bit(11) == 1) {
       // Pre-index.
       address = rn_val + offset;
       wb_address = address;
     } else {
       // Post-index.
       address = rn_val;
       wb_address = rn_val + offset;
     }
   } else if (instr->Bits(10, 2) == 2) {
     // addr = rn + (rm EXT optionally scaled by operand instruction size).
     const Register rm = instr->RmField();
     const Extend ext = instr->ExtendTypeField();
-    const uint8_t scale =
-        (ext == UXTX) && (instr->Bit(12) == 1) ? size : 0;
+    const uint8_t scale = (ext == UXTX) && (instr->Bit(12) == 1) ? size : 0;
     const int64_t rm_val = get_register(rm, R31IsZR);
     const int64_t offset = ExtendOperand(kXRegSizeInBits, rm_val, ext, scale);
     address = rn_val + offset;
   } else {
     UnimplementedInstruction(instr);
     return;
   }
 
   // Check the address.
   if (IsIllegalAddress(address)) {
@@ skipping 249 matching lines @@
     // Format(instr, "ldrx 'rt, 'pcldr");
     set_register(instr, rt, val, R31IsZR);
   } else {
     // Format(instr, "ldrw 'rt, 'pcldr");
     set_wregister(rt, static_cast<int32_t>(val), R31IsZR);
   }
 }
 
 
 void Simulator::DecodeLoadStoreExclusive(Instr* instr) {
-  if ((instr->Bit(23) != 0) ||
-      (instr->Bit(21) != 0) ||
-      (instr->Bit(15) != 0)) {
+  if ((instr->Bit(23) != 0) || (instr->Bit(21) != 0) || (instr->Bit(15) != 0)) {
     UNIMPLEMENTED();
   }
   const int32_t size = instr->Bits(30, 2);
   if (size != 3) {
     UNIMPLEMENTED();
   }
 
   const Register rs = instr->RsField();
   const Register rn = instr->RnField();
   const Register rt = instr->RtField();
@@ skipping 580 matching lines @@
   const Register rn = instr->RnField();
   const Register rd = instr->RdField();
   if ((op == 0) && (imm4 == 7)) {
     if (Q == 0) {
       // Format(instr, "vmovrs 'rd, 'vn'idx5");
       set_wregister(rd, get_vregisters(vn, idx5), R31IsZR);
     } else {
       // Format(instr, "vmovrd 'rd, 'vn'idx5");
       set_register(instr, rd, get_vregisterd(vn, idx5), R31IsZR);
     }
-  } else if ((Q == 1)  && (op == 0) && (imm4 == 0)) {
+  } else if ((Q == 1) && (op == 0) && (imm4 == 0)) {
     // Format(instr, "vdup'csz 'vd, 'vn'idx5");
     if (element_bytes == 4) {
       for (int i = 0; i < 4; i++) {
         set_vregisters(vd, i, get_vregisters(vn, idx5));
       }
     } else if (element_bytes == 8) {
       for (int i = 0; i < 2; i++) {
         set_vregisterd(vd, i, get_vregisterd(vn, idx5));
       }
     } else {
@@ skipping 190 matching lines @@
         return;
       }
       set_vregisterd(vd, idx, res);
     }
   }
 }
 
 
 static float arm_reciprocal_sqrt_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-87.
-  if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
-  else if (a == 0.0) return kPosInfinity;
-  else if (isnan(a)) return a;
+  if (isinf(a) || (fabs(a) >= exp2f(126)))
+    return 0.0;
+  else if (a == 0.0)
+    return kPosInfinity;
+  else if (isnan(a))
+    return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
   uint64_t scaled;
   if (((a_bits >> 23) & 1) != 0) {
     // scaled = '0 01111111101' : operand<22:0> : Zeros(29)
     scaled = (static_cast<uint64_t>(0x3fd) << 52) |
              ((static_cast<uint64_t>(a_bits) & 0x7fffff) << 29);
   } else {
     // scaled = '0 01111111110' : operand<22:0> : Zeros(29)
     scaled = (static_cast<uint64_t>(0x3fe) << 52) |
@@ skipping 17 matching lines @@
     // range 0.5 <= a < 1.0
 
     // a in units of 1/256 rounded down.
     int32_t q1 = static_cast<int32_t>(scaled_d * 256.0);
     // reciprocal root r.
     r = 1.0 / sqrt((static_cast<double>(q1) + 0.5) / 256.0);
   }
   // r in units of 1/256 rounded to nearest.
   int32_t s = static_cast<int>(256.0 * r + 0.5);
   double estimate = static_cast<double>(s) / 256.0;
-  ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+  ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = 0 : result_exp<7:0> : estimate<51:29>
-  int32_t result_bits = ((result_exp & 0xff) << 23) |
+  int32_t result_bits =
+      ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 static float arm_recip_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-85.
-  if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
-  else if (a == 0.0) return kPosInfinity;
-  else if (isnan(a)) return a;
+  if (isinf(a) || (fabs(a) >= exp2f(126)))
+    return 0.0;
+  else if (a == 0.0)
+    return kPosInfinity;
+  else if (isnan(a))
+    return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
   // scaled = '0011 1111 1110' : a<22:0> : Zeros(29)
   uint64_t scaled = (static_cast<uint64_t>(0x3fe) << 52) |
                     ((static_cast<uint64_t>(a_bits) & 0x7fffff) << 29);
   // result_exp = 253 - UInt(a<30:23>)
   int32_t result_exp = 253 - ((a_bits >> 23) & 0xff);
   ASSERT((result_exp >= 1) && (result_exp <= 252));
 
   double scaled_d = bit_cast<double, uint64_t>(scaled);
   ASSERT((scaled_d >= 0.5) && (scaled_d < 1.0));
 
   // a in units of 1/512 rounded down.
   int32_t q = static_cast<int32_t>(scaled_d * 512.0);
   // reciprocal r.
   double r = 1.0 / ((static_cast<double>(q) + 0.5) / 512.0);
   // r in units of 1/256 rounded to nearest.
   int32_t s = static_cast<int32_t>(256.0 * r + 0.5);
   double estimate = static_cast<double>(s) / 256.0;
-  ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
+  ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = sign : result_exp<7:0> : estimate<51:29>
   int32_t result_bits =
       (a_bits & 0x80000000) | ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 void Simulator::DecodeSIMDTwoReg(Instr* instr) {
@@ skipping 139 matching lines @@
 
   if ((instr->Bit(29) != 0) || (instr->Bits(22, 2) != 1) ||
       ((instr->SFField() == 0) && (instr->Bits(16, 5) != 2))) {
     UnimplementedInstruction(instr);
     return;
   }
   if (instr->Bits(16, 5) == 2) {
     // Format(instr, "scvtfd'sf 'vd, 'rn");
     const int64_t rn_val64 = get_register(rn, instr->RnMode());
     const int32_t rn_val32 = get_wregister(rn, instr->RnMode());
-    const double vn_dbl = (instr->SFField() == 1) ?
-        static_cast<double>(rn_val64) : static_cast<double>(rn_val32);
+    const double vn_dbl = (instr->SFField() == 1)
+                              ? static_cast<double>(rn_val64)
+                              : static_cast<double>(rn_val32);
     set_vregisterd(vd, 0, bit_cast<int64_t, double>(vn_dbl));
     set_vregisterd(vd, 1, 0);
   } else if (instr->Bits(16, 5) == 6) {
     // Format(instr, "fmovrd'sf 'rd, 'vn");
     const int64_t vn_val = get_vregisterd(vn, 0);
     set_register(instr, rd, vn_val, R31IsZR);
   } else if (instr->Bits(16, 5) == 7) {
     // Format(instr, "fmovdr'sf 'vd, 'rn");
     const int64_t rn_val = get_register(rn, R31IsZR);
     set_vregisterd(vd, 0, rn_val);
@@ skipping 366 matching lines @@
   set_register(NULL, THR, reinterpret_cast<int64_t>(thread));
   // Set the tag.
   thread->set_vm_tag(VMTag::kDartTagId);
   // Clear top exit frame.
   thread->set_top_exit_frame_info(0);
 
   ASSERT(raw_exception != Object::null());
   set_register(NULL, kExceptionObjectReg, bit_cast<int64_t>(raw_exception));
   set_register(NULL, kStackTraceObjectReg, bit_cast<int64_t>(raw_stacktrace));
   // Restore pool pointer.
-  int64_t code = *reinterpret_cast<int64_t*>(
-      fp + kPcMarkerSlotFromFp * kWordSize);
-  int64_t pp = *reinterpret_cast<int64_t*>(
-      code + Code::object_pool_offset() - kHeapObjectTag);
+  int64_t code =
+      *reinterpret_cast<int64_t*>(fp + kPcMarkerSlotFromFp * kWordSize);
+  int64_t pp = *reinterpret_cast<int64_t*>(code + Code::object_pool_offset() -
+                                           kHeapObjectTag);
   pp -= kHeapObjectTag;  // In the PP register, the pool pointer is untagged.
   set_register(NULL, CODE_REG, code);
   set_register(NULL, PP, pp);
   buf->Longjmp();
 }
 
 }  // namespace dart
 
 #endif  // !defined(USING_SIMULATOR)
 
 #endif  // defined TARGET_ARCH_ARM64