| Index: src/arm/macro-assembler-arm.cc
|
| diff --git a/src/arm/macro-assembler-arm.cc b/src/arm/macro-assembler-arm.cc
|
| index e8e72b54c08e96f92d7eff4636c8ad6a20fb1a00..af138594a8605b5b2566b34ddb2d45fe7faac337 100644
|
| --- a/src/arm/macro-assembler-arm.cc
|
| +++ b/src/arm/macro-assembler-arm.cc
|
| @@ -97,7 +97,7 @@ void MacroAssembler::Call(Register target, Condition cond) {
|
| int MacroAssembler::CallSize(
|
| Address target, RelocInfo::Mode rmode, Condition cond) {
|
| int size = 2 * kInstrSize;
|
| - Instr mov_instr = cond | MOV | LeaveCC;
|
| + Instr mov_instr = cond | MOV | LeaveCCBit;
|
| intptr_t immediate = reinterpret_cast<intptr_t>(target);
|
| if (!Operand(immediate, rmode).is_single_instruction(this, mov_instr)) {
|
| size += kInstrSize;
|
| @@ -109,7 +109,7 @@ int MacroAssembler::CallSize(
|
| int MacroAssembler::CallSizeNotPredictableCodeSize(
|
| Address target, RelocInfo::Mode rmode, Condition cond) {
|
| int size = 2 * kInstrSize;
|
| - Instr mov_instr = cond | MOV | LeaveCC;
|
| + Instr mov_instr = cond | MOV | LeaveCCBit;
|
| intptr_t immediate = reinterpret_cast<intptr_t>(target);
|
| if (!Operand(immediate, rmode).is_single_instruction(NULL, mov_instr)) {
|
| size += kInstrSize;
|
| @@ -149,7 +149,7 @@ void MacroAssembler::Call(Address target,
|
| // we have to do it explicitly.
|
| positions_recorder()->WriteRecordedPositions();
|
|
|
| - mov(ip, Operand(reinterpret_cast<int32_t>(target), rmode));
|
| + mov(ip, Operand(reinterpret_cast<int32_t>(target), rmode), LeaveCC);
|
| blx(ip, cond);
|
|
|
| if (mode == NEVER_INLINE_TARGET_ADDRESS) {
|
| @@ -208,13 +208,13 @@ void MacroAssembler::Swap(Register reg1,
|
| Register scratch,
|
| Condition cond) {
|
| if (scratch.is(no_reg)) {
|
| - eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
|
| - eor(reg2, reg2, Operand(reg1), LeaveCC, cond);
|
| - eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
|
| + eor(reg1, reg1, Operand(reg2), DontCareCC, cond);
|
| + eor(reg2, reg2, Operand(reg1), DontCareCC, cond);
|
| + eor(reg1, reg1, Operand(reg2), DontCareCC, cond);
|
| } else {
|
| - mov(scratch, reg1, LeaveCC, cond);
|
| - mov(reg1, reg2, LeaveCC, cond);
|
| - mov(reg2, scratch, LeaveCC, cond);
|
| + mov(scratch, reg1, DontCareCC, cond);
|
| + mov(reg1, reg2, DontCareCC, cond);
|
| + mov(reg2, scratch, DontCareCC, cond);
|
| }
|
| }
|
|
|
| @@ -231,7 +231,7 @@ void MacroAssembler::Push(Handle<Object> handle) {
|
|
|
|
|
| void MacroAssembler::Move(Register dst, Handle<Object> value) {
|
| - mov(dst, Operand(value));
|
| + mov(dst, Operand(value), LeaveCC);
|
| }
|
|
|
|
|
| @@ -254,7 +254,7 @@ void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
|
| if (!src2.is_reg() &&
|
| !src2.must_output_reloc_info(this) &&
|
| src2.immediate() == 0) {
|
| - mov(dst, Operand::Zero(), LeaveCC, cond);
|
| + mov(dst, Operand::Zero(), DontCareCC, cond);
|
| } else if (!src2.is_single_instruction(this) &&
|
| !src2.must_output_reloc_info(this) &&
|
| CpuFeatures::IsSupported(ARMv7) &&
|
| @@ -262,7 +262,7 @@ void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
|
| ubfx(dst, src1, 0,
|
| WhichPowerOf2(static_cast<uint32_t>(src2.immediate()) + 1), cond);
|
| } else {
|
| - and_(dst, src1, src2, LeaveCC, cond);
|
| + and_(dst, src1, src2, DontCareCC, cond);
|
| }
|
| }
|
|
|
| @@ -272,9 +272,9 @@ void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width,
|
| ASSERT(lsb < 32);
|
| if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
|
| int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
|
| - and_(dst, src1, Operand(mask), LeaveCC, cond);
|
| + and_(dst, src1, Operand(mask), DontCareCC, cond);
|
| if (lsb != 0) {
|
| - mov(dst, Operand(dst, LSR, lsb), LeaveCC, cond);
|
| + mov(dst, Operand(dst, LSR, lsb), DontCareCC, cond);
|
| }
|
| } else {
|
| ubfx(dst, src1, lsb, width, cond);
|
| @@ -287,14 +287,14 @@ void MacroAssembler::Sbfx(Register dst, Register src1, int lsb, int width,
|
| ASSERT(lsb < 32);
|
| if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
|
| int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
|
| - and_(dst, src1, Operand(mask), LeaveCC, cond);
|
| + and_(dst, src1, Operand(mask), DontCareCC, cond);
|
| int shift_up = 32 - lsb - width;
|
| int shift_down = lsb + shift_up;
|
| if (shift_up != 0) {
|
| - mov(dst, Operand(dst, LSL, shift_up), LeaveCC, cond);
|
| + mov(dst, Operand(dst, LSL, shift_up), DontCareCC, cond);
|
| }
|
| if (shift_down != 0) {
|
| - mov(dst, Operand(dst, ASR, shift_down), LeaveCC, cond);
|
| + mov(dst, Operand(dst, ASR, shift_down), DontCareCC, cond);
|
| }
|
| } else {
|
| sbfx(dst, src1, lsb, width, cond);
|
|
|