Thumb2 Backend: Make arithmetic instructions set condition codes by default

src/arm/macro-assembler-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 79 matching lines @@
   BlockConstPoolScope block_const_pool(this);
   Label start;
   bind(&start);
   blx(target, cond);
 }
 
 
 int MacroAssembler::CallSize(
     Address target, RelocInfo::Mode rmode, Condition cond) {
   int size = 2 * kInstrSize;
-  Instr mov_instr = cond | MOV | LeaveCC;
+  Instr mov_instr = cond | MOV | LeaveCCBit;
   intptr_t immediate = reinterpret_cast<intptr_t>(target);
   if (!Operand(immediate, rmode).is_single_instruction(this, mov_instr)) {
     size += kInstrSize;
   }
   return size;
 }
 
 
 int MacroAssembler::CallSizeNotPredictableCodeSize(
     Address target, RelocInfo::Mode rmode, Condition cond) {
   int size = 2 * kInstrSize;
-  Instr mov_instr = cond | MOV | LeaveCC;
+  Instr mov_instr = cond | MOV | LeaveCCBit;
   intptr_t immediate = reinterpret_cast<intptr_t>(target);
   if (!Operand(immediate, rmode).is_single_instruction(NULL, mov_instr)) {
     size += kInstrSize;
   }
   return size;
 }
 
 
 void MacroAssembler::Call(Address target,
                           RelocInfo::Mode rmode,
@@ skipping 19 matching lines @@
   //  ldr   ip, [pc, #...] @ call address
   //  blx   ip
   //                      @ return address
 
   // Statement positions are expected to be recorded when the target
   // address is loaded. The mov method will automatically record
   // positions when pc is the target, since this is not the case here
   // we have to do it explicitly.
   positions_recorder()->WriteRecordedPositions();
 
-  mov(ip, Operand(reinterpret_cast<int32_t>(target), rmode));
+  mov(ip, Operand(reinterpret_cast<int32_t>(target), rmode), LeaveCC);
   blx(ip, cond);
 
   if (mode == NEVER_INLINE_TARGET_ADDRESS) {
     set_predictable_code_size(old_predictable_code_size);
   }
 }
 
 
 int MacroAssembler::CallSize(Handle<Code> code,
                              RelocInfo::Mode rmode,
@@ skipping 38 matching lines @@
   Drop(drop, cond);
   Ret(cond);
 }
 
 
 void MacroAssembler::Swap(Register reg1,
                           Register reg2,
                           Register scratch,
                           Condition cond) {
   if (scratch.is(no_reg)) {
-    eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
-    eor(reg2, reg2, Operand(reg1), LeaveCC, cond);
-    eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
+    eor(reg1, reg1, Operand(reg2), DontCareCC, cond);
+    eor(reg2, reg2, Operand(reg1), DontCareCC, cond);
+    eor(reg1, reg1, Operand(reg2), DontCareCC, cond);
   } else {
-    mov(scratch, reg1, LeaveCC, cond);
-    mov(reg1, reg2, LeaveCC, cond);
-    mov(reg2, scratch, LeaveCC, cond);
+    mov(scratch, reg1, DontCareCC, cond);
+    mov(reg1, reg2, DontCareCC, cond);
+    mov(reg2, scratch, DontCareCC, cond);
   }
 }
 
 
 void MacroAssembler::Call(Label* target) {
   bl(target);
 }
 
 
 void MacroAssembler::Push(Handle<Object> handle) {
   mov(ip, Operand(handle));
   push(ip);
 }
 
 
 void MacroAssembler::Move(Register dst, Handle<Object> value) {
-  mov(dst, Operand(value));
+  mov(dst, Operand(value), LeaveCC);
 }
 
 
 void MacroAssembler::Move(Register dst, Register src, Condition cond) {
   if (!dst.is(src)) {
     mov(dst, src, LeaveCC, cond);
   }
 }
 
 
 void MacroAssembler::Move(DwVfpRegister dst, DwVfpRegister src) {
   if (!dst.is(src)) {
     vmov(dst, src);
   }
 }
 
 
 void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
                          Condition cond) {
   if (!src2.is_reg() &&
       !src2.must_output_reloc_info(this) &&
       src2.immediate() == 0) {
-    mov(dst, Operand::Zero(), LeaveCC, cond);
+    mov(dst, Operand::Zero(), DontCareCC, cond);
   } else if (!src2.is_single_instruction(this) &&
              !src2.must_output_reloc_info(this) &&
              CpuFeatures::IsSupported(ARMv7) &&
              IsPowerOf2(src2.immediate() + 1)) {
     ubfx(dst, src1, 0,
         WhichPowerOf2(static_cast<uint32_t>(src2.immediate()) + 1), cond);
   } else {
-    and_(dst, src1, src2, LeaveCC, cond);
+    and_(dst, src1, src2, DontCareCC, cond);
   }
 }
 
 
 void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width,
                           Condition cond) {
   ASSERT(lsb < 32);
   if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
     int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
-    and_(dst, src1, Operand(mask), LeaveCC, cond);
+    and_(dst, src1, Operand(mask), DontCareCC, cond);
     if (lsb != 0) {
-      mov(dst, Operand(dst, LSR, lsb), LeaveCC, cond);
+      mov(dst, Operand(dst, LSR, lsb), DontCareCC, cond);
     }
   } else {
     ubfx(dst, src1, lsb, width, cond);
   }
 }
 
 
 void MacroAssembler::Sbfx(Register dst, Register src1, int lsb, int width,
                           Condition cond) {
   ASSERT(lsb < 32);
   if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
     int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
-    and_(dst, src1, Operand(mask), LeaveCC, cond);
+    and_(dst, src1, Operand(mask), DontCareCC, cond);
     int shift_up = 32 - lsb - width;
     int shift_down = lsb + shift_up;
     if (shift_up != 0) {
-      mov(dst, Operand(dst, LSL, shift_up), LeaveCC, cond);
+      mov(dst, Operand(dst, LSL, shift_up), DontCareCC, cond);
     }
     if (shift_down != 0) {
-      mov(dst, Operand(dst, ASR, shift_down), LeaveCC, cond);
+      mov(dst, Operand(dst, ASR, shift_down), DontCareCC, cond);
     }
   } else {
     sbfx(dst, src1, lsb, width, cond);
   }
 }
 
 
 void MacroAssembler::Bfi(Register dst,
                          Register src,
                          Register scratch,
@@ skipping 3599 matching lines @@
 void CodePatcher::EmitCondition(Condition cond) {
   Instr instr = Assembler::instr_at(masm_.pc_);
   instr = (instr & ~kCondMask) | cond;
   masm_.emit(instr);
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM