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Unified Diff: src/arm/assembler-arm.h

Issue 24793002: Thumb2 Backend: Make arithmetic instructions set condition codes by default Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 3 months ago
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Index: src/arm/assembler-arm.h
diff --git a/src/arm/assembler-arm.h b/src/arm/assembler-arm.h
index 8a443ce1a69434b33403e0eed26e3073469f6705..507a845b11ff8f420555d16813464f0e9590a191 100644
--- a/src/arm/assembler-arm.h
+++ b/src/arm/assembler-arm.h
@@ -835,6 +835,10 @@ class Assembler : public AssemblerBase {
// Aligns code to something that's optimal for a jump target for the platform.
void CodeTargetAlign();
+ SBit sbit_from_mode(SBitMode smode) {
+ return smode == SetCC ? SetCCBit : LeaveCCBit;
+ }
+
// Branch instructions
void b(int branch_offset, Condition cond = al);
void b_thumb(int branch_offset, Condition cond);
@@ -855,28 +859,28 @@ class Assembler : public AssemblerBase {
// Data-processing instructions
void and_(Register dst, Register src1, const Operand& src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void and_imm_t1(Register dst, Register src1, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void and_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
void and_thumb(Register dst, Register src1, const Operand& src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void eor(Register dst, Register src1, const Operand& src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void eor_imm_t1(Register dst, Register src1, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void eor_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
void eor_thumb(Register dst, Register src1, const Operand& src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void sub(Register dst, Register src1, const Operand& src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void sub(Register dst, Register src1, Register src2,
- SBit s = LeaveCC, Condition cond = al) {
- sub(dst, src1, Operand(src2), s, cond);
+ SBitMode smode = DontCareCC, Condition cond = al) {
+ sub(dst, src1, Operand(src2), smode, cond);
}
void sub_imm_t3(Register dst, Register src1, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
@@ -885,22 +889,22 @@ class Assembler : public AssemblerBase {
void sub_reg_t3(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
void sub_thumb(Register dst, Register src1, const Operand& src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void rsb(Register dst, Register src1, const Operand& src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void rsb_imm_t2(Register dst, Register src1, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void rsb_reg_t1(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
void rsb_thumb(Register dst, Register src1, const Operand& src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void add(Register dst, Register src1, const Operand& src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void add(Register dst, Register src1, Register src2,
- SBit s = LeaveCC, Condition cond = al) {
- add(dst, src1, Operand(src2), s, cond);
+ SBitMode smode = DontCareCC, Condition cond = al) {
+ add(dst, src1, Operand(src2), smode, cond);
}
void add_imm_t3(Register dst, Register src1, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
@@ -909,28 +913,29 @@ class Assembler : public AssemblerBase {
void add_reg_t3(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
void add_thumb(Register dst, Register src1, const Operand& src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void adc(Register dst, Register src1, const Operand& src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void adc_imm_t1(Register dst, Register src1, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void adc_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
void adc_thumb(Register dst, Register src1, const Operand& src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void sbc(Register dst, Register src1, const Operand& src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void sbc_imm_t1(Register dst, Register src1, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void sbc_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
void sbc_thumb(Register dst, Register src1, const Operand& src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
+
void rsc(Register dst, Register src1, const Operand& src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void tst(Register src1, const Operand& src2, Condition cond = al);
void tst(Register src1, Register src2, Condition cond = al) {
@@ -964,22 +969,24 @@ class Assembler : public AssemblerBase {
void cmn_thumb(Register src1, const Operand& src2, Condition cond);
void orr(Register dst, Register src1, const Operand& src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void orr(Register dst, Register src1, Register src2,
- SBit s = LeaveCC, Condition cond = al) {
- orr(dst, src1, Operand(src2), s, cond);
+ SBitMode smode = DontCareCC, Condition cond = al) {
+ orr(dst, src1, Operand(src2), smode, cond);
}
+
void orr_imm_t1(Register dst, Register src1, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void orr_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
void orr_thumb(Register dst, Register src1, const Operand& src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void mov(Register dst, const Operand& src,
- SBit s = LeaveCC, Condition cond = al);
- void mov(Register dst, Register src, SBit s = LeaveCC, Condition cond = al) {
- mov(dst, Operand(src), s, cond);
+ SBitMode smode = DontCareCC, Condition cond = al);
+ void mov(Register dst, Register src,
+ SBitMode smode = DontCareCC, Condition cond = al) {
+ mov(dst, Operand(src), smode, cond);
}
void mov_imm_t2(Register dst, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
@@ -988,20 +995,24 @@ class Assembler : public AssemblerBase {
void mov_reg_t3(Register dst, const Operand& src,
SBit s, Condition cond);
void mov_thumb(Register dst, const Operand& src,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void lsl_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
void lsl_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
- void lsl_thumb(Register dst, const Operand& src, SBit s, Condition cond);
+ void lsl_thumb(Register dst, const Operand& src,
+ SBitMode smode, Condition cond);
void lsr_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
void lsr_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
- void lsr_thumb(Register dst, const Operand& src, SBit s, Condition cond);
+ void lsr_thumb(Register dst, const Operand& src,
+ SBitMode smode, Condition cond);
void asr_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
void asr_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
- void asr_thumb(Register dst, const Operand& src, SBit s, Condition cond);
+ void asr_thumb(Register dst, const Operand& src,
+ SBitMode smode, Condition cond, bool is_in_it_block);
void ror_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
void ror_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
- void ror_thumb(Register dst, const Operand& src, SBit s, Condition cond);
+ void ror_thumb(Register dst, const Operand& src,
+ SBitMode smode, Condition cond);
// ARMv7 instructions for loading a 32 bit immediate in two instructions.
// This may actually emit a different mov instruction, but on an ARMv7 it
@@ -1010,31 +1021,30 @@ class Assembler : public AssemblerBase {
// The constant for movt should be in the range 0-0xffff.
void movt(Register reg, uint32_t immediate, Condition cond = al);
void movt_thumb(Register reg, uint32_t immediate, Condition cond = al);
-
void bic(Register dst, Register src1, const Operand& src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void bic_imm_t1(Register dst, Register src1, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void bic_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
void bic_thumb(Register dst, Register src1, const Operand& src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void mvn(Register dst, const Operand& src,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void mvn_imm_t1(Register dst, SBit s, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void mvn_reg_t2(Register dst, const Operand& src,
SBit s, Condition cond);
void mvn_thumb(Register dst, const Operand& src,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
// Multiply instructions
void mla(Register dst, Register src1, Register src2, Register srcA,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void mla_thumb(Register dst, Register src1, Register src2, Register srcA,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void mls(Register dst, Register src1, Register src2, Register srcA,
Condition cond = al);
@@ -1047,31 +1057,31 @@ class Assembler : public AssemblerBase {
Condition cond);
void mul(Register dst, Register src1, Register src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void mul_t2(Register dst, Register src1, Register src2,
SBit s, Condition cond);
void mul_thumb(Register dst, Register src1, Register src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void smlal(Register dstL, Register dstH, Register src1, Register src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void smlal_thumb(Register dstL, Register dstH, Register src1, Register src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void smull(Register dstL, Register dstH, Register src1, Register src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void smull_thumb(Register dstL, Register dstH, Register src1, Register src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void umlal(Register dstL, Register dstH, Register src1, Register src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void umlal_thumb(Register dstL, Register dstH, Register src1, Register src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
void umull(Register dstL, Register dstH, Register src1, Register src2,
- SBit s = LeaveCC, Condition cond = al);
+ SBitMode smode = DontCareCC, Condition cond = al);
void umull_thumb(Register dstL, Register dstH, Register src1, Register src2,
- SBit s, Condition cond);
+ SBitMode smode, Condition cond);
// Miscellaneous arithmetic instructions
@@ -1447,7 +1457,10 @@ class Assembler : public AssemblerBase {
void it_thumb(Condition cond, int num_instr, bool cond2 = false,
bool cond3 = false, bool cond4 = false);
- inline void emit_it(Condition cond);
+
+ inline bool emit_it(Condition cond);
+ inline bool it_block_smode_check(bool is_in_it_block, SBitMode smode);
+
void ldr_pc_thumb(Register dst, const Operand& src);
static bool use_immediate_embedded_pointer_loads(
@@ -1734,15 +1747,15 @@ class Assembler : public AssemblerBase {
// 32-bit immediate values
void move_32_bit_immediate(Condition cond,
Register rd,
- SBit s,
const Operand& x);
void move_32_bit_immediate_thumb(Register rd,
- SBit s,
+ SBitMode smode,
const Operand& x,
Condition cond = al);
// Instruction generation
- void addrmod1(Instr instr, Register rn, Register rd, const Operand& x);
+ void addrmod1(Instr instr, SBitMode smode,
+ Register rn, Register rd, const Operand& x);
void addrmod2(Instr instr, Register rd, const MemOperand& x);
void addrmod3(Instr instr, Register rd, const MemOperand& x);
void addrmod4(Instr instr, Register rn, RegList rl);
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