Thumb2 Backend: Make arithmetic instructions set condition codes by default

src/arm/assembler-arm.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 817 matching lines @@
   // ---------------------------------------------------------------------------
   // Code generation
 
   // Insert the smallest number of nop instructions
   // possible to align the pc offset to a multiple
   // of m. m must be a power of 2 (>= 4).
   void Align(int m);
   // Aligns code to something that's optimal for a jump target for the platform.
   void CodeTargetAlign();
 
+  SBit sbit_from_mode(SBitMode smode) {
+    return smode == SetCC ? SetCCBit : LeaveCCBit;
+  }
+
   // Branch instructions
   void b(int branch_offset, Condition cond = al);
   void b_thumb(int branch_offset, Condition cond);
   void bl(int branch_offset, Condition cond = al);
   void blx(int branch_offset);  // v5 and above
   void blx(Register target, Condition cond = al);  // v5 and above
   void bx(Register target, Condition cond = al);  // v5 and above, plus v4t
 
   // Convenience branch instructions using labels
   void b(Label* L, Condition cond = al)  {
     b(branch_offset(L, cond == al), cond);
   }
   void b(Condition cond, Label* L)  { b(branch_offset(L, cond == al), cond); }
   void bl(Label* L, Condition cond = al)  { bl(branch_offset(L, false), cond); }
   void bl(Condition cond, Label* L)  { bl(branch_offset(L, false), cond); }
   void blx(Label* L)  { blx(branch_offset(L, false)); }  // v5 and above
 
   // Data-processing instructions
 
   void and_(Register dst, Register src1, const Operand& src2,
-            SBit s = LeaveCC, Condition cond = al);
+            SBitMode smode = DontCareCC, Condition cond = al);
   void and_imm_t1(Register dst, Register src1, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void and_reg_t2(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void and_thumb(Register dst, Register src1, const Operand& src2,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void eor(Register dst, Register src1, const Operand& src2,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void eor_imm_t1(Register dst, Register src1, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void eor_reg_t2(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void eor_thumb(Register dst, Register src1, const Operand& src2,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void sub(Register dst, Register src1, const Operand& src2,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void sub(Register dst, Register src1, Register src2,
-           SBit s = LeaveCC, Condition cond = al) {
-    sub(dst, src1, Operand(src2), s, cond);
+           SBitMode smode = DontCareCC, Condition cond = al) {
+    sub(dst, src1, Operand(src2), smode, cond);
   }
   void sub_imm_t3(Register dst, Register src1, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void sub_imm_t4(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void sub_reg_t3(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void sub_thumb(Register dst, Register src1, const Operand& src2,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void rsb(Register dst, Register src1, const Operand& src2,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void rsb_imm_t2(Register dst, Register src1, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void rsb_reg_t1(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void rsb_thumb(Register dst, Register src1, const Operand& src2,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void add(Register dst, Register src1, const Operand& src2,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void add(Register dst, Register src1, Register src2,
-           SBit s = LeaveCC, Condition cond = al) {
-    add(dst, src1, Operand(src2), s, cond);
+           SBitMode smode = DontCareCC, Condition cond = al) {
+    add(dst, src1, Operand(src2), smode, cond);
   }
   void add_imm_t3(Register dst, Register src1, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void add_imm_t4(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void add_reg_t3(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void add_thumb(Register dst, Register src1, const Operand& src2,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void adc(Register dst, Register src1, const Operand& src2,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void adc_imm_t1(Register dst, Register src1, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void adc_reg_t2(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void adc_thumb(Register dst, Register src1, const Operand& src2,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void sbc(Register dst, Register src1, const Operand& src2,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void sbc_imm_t1(Register dst, Register src1, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void sbc_reg_t2(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void sbc_thumb(Register dst, Register src1, const Operand& src2,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
+
 
   void rsc(Register dst, Register src1, const Operand& src2,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
 
   void tst(Register src1, const Operand& src2, Condition cond = al);
   void tst(Register src1, Register src2, Condition cond = al) {
     tst(src1, Operand(src2), cond);
   }
   void tst_imm_t1(Register src1, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void tst_reg_t2(Register src1, const Operand& src2, Condition cond);
   void tst_thumb(Register src1, const Operand& src2, Condition cond);
 
@@ skipping 13 matching lines @@
   void cmp_thumb(Register src1, const Operand& src2, Condition cond);
   void cmp_raw_immediate(Register src1, int raw_immediate, Condition cond = al);
 
   void cmn(Register src1, const Operand& src2, Condition cond = al);
   void cmn_imm_t1(Register src1, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void cmn_reg_t2(Register src1, const Operand& src2, Condition cond);
   void cmn_thumb(Register src1, const Operand& src2, Condition cond);
 
   void orr(Register dst, Register src1, const Operand& src2,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void orr(Register dst, Register src1, Register src2,
-           SBit s = LeaveCC, Condition cond = al) {
-    orr(dst, src1, Operand(src2), s, cond);
+           SBitMode smode = DontCareCC, Condition cond = al) {
+    orr(dst, src1, Operand(src2), smode, cond);
   }
+
   void orr_imm_t1(Register dst, Register src1, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void orr_reg_t2(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void orr_thumb(Register dst, Register src1, const Operand& src2,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void mov(Register dst, const Operand& src,
-           SBit s = LeaveCC, Condition cond = al);
-  void mov(Register dst, Register src, SBit s = LeaveCC, Condition cond = al) {
-    mov(dst, Operand(src), s, cond);
+           SBitMode smode = DontCareCC, Condition cond = al);
+  void mov(Register dst, Register src,
+           SBitMode smode = DontCareCC, Condition cond = al) {
+    mov(dst, Operand(src), smode, cond);
   }
   void mov_imm_t2(Register dst, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void mov_imm_t3(Register dst, const Operand& src,
                   SBit s, Condition cond);
   void mov_reg_t3(Register dst, const Operand& src,
                   SBit s, Condition cond);
   void mov_thumb(Register dst, const Operand& src,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void lsl_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
   void lsl_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
-  void lsl_thumb(Register dst, const Operand& src, SBit s, Condition cond);
+  void lsl_thumb(Register dst, const Operand& src,
+                 SBitMode smode, Condition cond);
   void lsr_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
   void lsr_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
-  void lsr_thumb(Register dst, const Operand& src, SBit s, Condition cond);
+  void lsr_thumb(Register dst, const Operand& src,
+                 SBitMode smode, Condition cond);
   void asr_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
   void asr_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
-  void asr_thumb(Register dst, const Operand& src, SBit s, Condition cond);
+  void asr_thumb(Register dst, const Operand& src,
+                 SBitMode smode, Condition cond, bool is_in_it_block);
   void ror_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
   void ror_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
-  void ror_thumb(Register dst, const Operand& src, SBit s, Condition cond);
+  void ror_thumb(Register dst, const Operand& src,
+                 SBitMode smode, Condition cond);
 
   // ARMv7 instructions for loading a 32 bit immediate in two instructions.
   // This may actually emit a different mov instruction, but on an ARMv7 it
   // is guaranteed to only emit one instruction.
   void movw(Register reg, uint32_t immediate, Condition cond = al);
   // The constant for movt should be in the range 0-0xffff.
   void movt(Register reg, uint32_t immediate, Condition cond = al);
   void movt_thumb(Register reg, uint32_t immediate, Condition cond = al);
-
   void bic(Register dst, Register src1, const Operand& src2,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void bic_imm_t1(Register dst, Register src1, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void bic_reg_t2(Register dst, Register src1, const Operand& src2,
                   SBit s, Condition cond);
   void bic_thumb(Register dst, Register src1, const Operand& src2,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void mvn(Register dst, const Operand& src,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void mvn_imm_t1(Register dst, SBit s, Condition cond,
                   uint32_t i, uint32_t imm3, uint32_t imm8);
   void mvn_reg_t2(Register dst, const Operand& src,
                   SBit s, Condition cond);
   void mvn_thumb(Register dst, const Operand& src,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   // Multiply instructions
 
   void mla(Register dst, Register src1, Register src2, Register srcA,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void mla_thumb(Register dst, Register src1, Register src2, Register srcA,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void mls(Register dst, Register src1, Register src2, Register srcA,
            Condition cond = al);
   void mls_thumb(Register dst, Register src1, Register src2, Register srcA,
                  Condition cond);
 
   void sdiv(Register dst, Register src1, Register src2,
             Condition cond = al);
   void sdiv_thumb(Register dst, Register src1, Register src2,
                   Condition cond);
 
   void mul(Register dst, Register src1, Register src2,
-           SBit s = LeaveCC, Condition cond = al);
+           SBitMode smode = DontCareCC, Condition cond = al);
   void mul_t2(Register dst, Register src1, Register src2,
               SBit s, Condition cond);
   void mul_thumb(Register dst, Register src1, Register src2,
-                 SBit s, Condition cond);
+                 SBitMode smode, Condition cond);
 
   void smlal(Register dstL, Register dstH, Register src1, Register src2,
-             SBit s = LeaveCC, Condition cond = al);
+             SBitMode smode = DontCareCC, Condition cond = al);
   void smlal_thumb(Register dstL, Register dstH, Register src1, Register src2,
-                   SBit s, Condition cond);
+                   SBitMode smode, Condition cond);
 
   void smull(Register dstL, Register dstH, Register src1, Register src2,
-             SBit s = LeaveCC, Condition cond = al);
+             SBitMode smode = DontCareCC, Condition cond = al);
   void smull_thumb(Register dstL, Register dstH, Register src1, Register src2,
-                   SBit s, Condition cond);
+                   SBitMode smode, Condition cond);
 
   void umlal(Register dstL, Register dstH, Register src1, Register src2,
-             SBit s = LeaveCC, Condition cond = al);
+             SBitMode smode = DontCareCC, Condition cond = al);
   void umlal_thumb(Register dstL, Register dstH, Register src1, Register src2,
-                   SBit s, Condition cond);
+                   SBitMode smode, Condition cond);
 
   void umull(Register dstL, Register dstH, Register src1, Register src2,
-             SBit s = LeaveCC, Condition cond = al);
+             SBitMode smode = DontCareCC, Condition cond = al);
   void umull_thumb(Register dstL, Register dstH, Register src1, Register src2,
-                   SBit s, Condition cond);
+                   SBitMode smode, Condition cond);
 
   // Miscellaneous arithmetic instructions
 
   void clz(Register dst, Register src, Condition cond = al);  // v5 and above
 
   // Saturating instructions. v6 and above.
 
   // Unsigned saturate.
   //
   // Saturate an optionally shifted signed value to an unsigned range.
@@ skipping 355 matching lines @@
 
   void pop() {
     add(sp, sp, Operand(kPointerSize));
   }
 
   // Jump unconditionally to given label.
   void jmp(Label* L) { b(L, al); }
 
   void it_thumb(Condition cond, int num_instr, bool cond2 = false,
                 bool cond3 = false, bool cond4 = false);
-  inline void emit_it(Condition cond);
+
+  inline bool emit_it(Condition cond);
+  inline bool it_block_smode_check(bool is_in_it_block, SBitMode smode);
+
   void ldr_pc_thumb(Register dst, const Operand& src);
 
   static bool use_immediate_embedded_pointer_loads(
       const Assembler* assembler) {
     return CpuFeatures::IsSupported(MOVW_MOVT_IMMEDIATE_LOADS) &&
         (assembler == NULL || !assembler->predictable_code_size());
   }
 
   // Check the code size generated from label to here.
   int SizeOfCodeGeneratedSince(Label* label) {
@@ skipping 266 matching lines @@
   // Code emission
   inline void CheckBuffer();
   void GrowBuffer();
   inline void emit(Instr x);
   inline void emit16(Instr16 x, bool check_buffer = true);
   inline void emit32(Instr x);  // proper half-word order for thumb
 
   // 32-bit immediate values
   void move_32_bit_immediate(Condition cond,
                              Register rd,
-                             SBit s,
                              const Operand& x);
   void move_32_bit_immediate_thumb(Register rd,
-                                   SBit s,
+                                   SBitMode smode,
                                    const Operand& x,
                                    Condition cond = al);
 
   // Instruction generation
-  void addrmod1(Instr instr, Register rn, Register rd, const Operand& x);
+  void addrmod1(Instr instr, SBitMode smode,
+                Register rn, Register rd, const Operand& x);
   void addrmod2(Instr instr, Register rd, const MemOperand& x);
   void addrmod3(Instr instr, Register rd, const MemOperand& x);
   void addrmod4(Instr instr, Register rn, RegList rl);
   void addrmod5(Instr instr, CRegister crd, const MemOperand& x);
 
   Instr16 thumb16_mode1(ThumbMode1Opcode16 op);  // A6.2.1 -> mode1
   Instr16 thumb16_mode2(ThumbMode2Opcode16 op);  // A6.2.2 -> mode2
   Instr16 thumb16_mode3(ThumbMode3Opcode16 op);  // A6.2.3 -> mode3
 
   // A6.2.4 -> mode4, opA 0101 -> _1
@@ skipping 127 matching lines @@
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBuffer();
   }
 };
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM_ASSEMBLER_ARM_H_