Subzero, MIPS32: Enable MIPS support in lit tests

tests_lit/llvm2ice_tests/fused-alloca-arg.ll

Index: tests_lit/llvm2ice_tests/fused-alloca-arg.ll
diff --git a/tests_lit/llvm2ice_tests/fused-alloca-arg.ll b/tests_lit/llvm2ice_tests/fused-alloca-arg.ll
index 1b009bae17e223aff454e47175d0bba6f0deb4a2..321d44f54eecbe2378b4bef9906c1d53dc643411 100644
--- a/tests_lit/llvm2ice_tests/fused-alloca-arg.ll
+++ b/tests_lit/llvm2ice_tests/fused-alloca-arg.ll
@@ -4,6 +4,12 @@
 ; RUN:   --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 
+; RUN: %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command %p2i --filetype=asm --assemble --disassemble --target \
+; RUN:   mips32 -i %s --args -O2 -allow-externally-defined-symbols \
+; RUN:   | %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command FileCheck --check-prefix MIPS32 %s
+
 declare void @copy(i32 %arg1, i8* %arr1, i8* %arr2, i8* %arr3, i8* %arr4);
 
 ; Test that alloca base addresses get passed correctly to functions.
@@ -32,6 +38,21 @@ entry:
 ; CHECK-NEXT:   call
 ; CHECK-NEXT:   add    esp,0x4c
 ; CHECK-NEXT:   ret
+; MIPS32-LABEL: caller1
+; MIPS32: 	addiu	sp,sp,-52
+; MIPS32: 	sw	ra,48(sp)
+; MIPS32: 	move	v0,a0
+; MIPS32: 	sw	v0,16(sp)
+; MIPS32: 	addiu	v0,sp,16
+; MIPS32: 	sw	v0,16(sp)
+; MIPS32: 	addiu	a1,sp,16
+; MIPS32: 	addiu	a2,sp,16
+; MIPS32: 	addiu	a3,sp,16
+; MIPS32: 	jal
+; MIPS32: 	nop
+; MIPS32: 	lw	ra,48(sp)
+; MIPS32: 	addiu	sp,sp,52
+; MIPS32: 	jr	ra
 
 ; Test that alloca base addresses get passed correctly to functions.
 define internal void @caller2(i32 %arg) {
@@ -63,3 +84,20 @@ entry:
 ; CHECK-NEXT:   call
 ; CHECK-NEXT:   add    esp,0x6c
 ; CHECK-NEXT:   ret
+; MIPS32-LABEL: caller2
+; MIPS32: 	addiu	sp,sp,-84
+; MIPS32: 	sw	ra,80(sp)
+; MIPS32: 	move	v0,a0
+; MIPS32: 	sw	v0,16(sp)
+; MIPS32: 	move	v0,a0
+; MIPS32: 	sw	v0,48(sp)
+; MIPS32: 	addiu	v0,sp,48
+; MIPS32: 	sw	v0,16(sp)
+; MIPS32: 	addiu	a1,sp,16
+; MIPS32: 	addiu	a2,sp,48
+; MIPS32: 	addiu	a3,sp,16
+; MIPS32: 	jal
+; MIPS32: 	nop
+; MIPS32: 	lw	ra,80(sp)
+; MIPS32: 	addiu	sp,sp,84
+; MIPS32: 	jr	ra