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1 ; This is a basic test of the alloca instruction and a call. | 1 ; This is a basic test of the alloca instruction and a call. |
2 | 2 |
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ | 4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ |
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
6 | 6 |
| 7 ; RUN: %if --need=target_MIPS32 --need=allow_dump \ |
| 8 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target \ |
| 9 ; RUN: mips32 -i %s --args -O2 -allow-externally-defined-symbols \ |
| 10 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \ |
| 11 ; RUN: --command FileCheck --check-prefix MIPS32 %s |
| 12 |
7 declare void @copy(i32 %arg1, i8* %arr1, i8* %arr2, i8* %arr3, i8* %arr4); | 13 declare void @copy(i32 %arg1, i8* %arr1, i8* %arr2, i8* %arr3, i8* %arr4); |
8 | 14 |
9 ; Test that alloca base addresses get passed correctly to functions. | 15 ; Test that alloca base addresses get passed correctly to functions. |
10 define internal void @caller1(i32 %arg) { | 16 define internal void @caller1(i32 %arg) { |
11 entry: | 17 entry: |
12 %a1 = alloca i8, i32 32, align 4 | 18 %a1 = alloca i8, i32 32, align 4 |
13 %p1 = bitcast i8* %a1 to i32* | 19 %p1 = bitcast i8* %a1 to i32* |
14 store i32 %arg, i32* %p1, align 1 | 20 store i32 %arg, i32* %p1, align 1 |
15 call void @copy(i32 %arg, i8* %a1, i8* %a1, i8* %a1, i8* %a1) | 21 call void @copy(i32 %arg, i8* %a1, i8* %a1, i8* %a1, i8* %a1) |
16 ret void | 22 ret void |
17 } | 23 } |
18 | 24 |
19 ; CHECK-LABEL: caller1 | 25 ; CHECK-LABEL: caller1 |
20 ; CHECK-NEXT: sub esp,0x4c | 26 ; CHECK-NEXT: sub esp,0x4c |
21 ; CHECK-NEXT: mov eax,DWORD PTR [esp+0x50] | 27 ; CHECK-NEXT: mov eax,DWORD PTR [esp+0x50] |
22 ; CHECK-NEXT: mov DWORD PTR [esp+0x20],eax | 28 ; CHECK-NEXT: mov DWORD PTR [esp+0x20],eax |
23 ; CHECK-NEXT: mov DWORD PTR [esp],eax | 29 ; CHECK-NEXT: mov DWORD PTR [esp],eax |
24 ; CHECK-NEXT: lea eax,[esp+0x20] | 30 ; CHECK-NEXT: lea eax,[esp+0x20] |
25 ; CHECK-NEXT: mov DWORD PTR [esp+0x4],eax | 31 ; CHECK-NEXT: mov DWORD PTR [esp+0x4],eax |
26 ; CHECK-NEXT: lea eax,[esp+0x20] | 32 ; CHECK-NEXT: lea eax,[esp+0x20] |
27 ; CHECK-NEXT: mov DWORD PTR [esp+0x8],eax | 33 ; CHECK-NEXT: mov DWORD PTR [esp+0x8],eax |
28 ; CHECK-NEXT: lea eax,[esp+0x20] | 34 ; CHECK-NEXT: lea eax,[esp+0x20] |
29 ; CHECK-NEXT: mov DWORD PTR [esp+0xc],eax | 35 ; CHECK-NEXT: mov DWORD PTR [esp+0xc],eax |
30 ; CHECK-NEXT: lea eax,[esp+0x20] | 36 ; CHECK-NEXT: lea eax,[esp+0x20] |
31 ; CHECK-NEXT: mov DWORD PTR [esp+0x10],eax | 37 ; CHECK-NEXT: mov DWORD PTR [esp+0x10],eax |
32 ; CHECK-NEXT: call | 38 ; CHECK-NEXT: call |
33 ; CHECK-NEXT: add esp,0x4c | 39 ; CHECK-NEXT: add esp,0x4c |
34 ; CHECK-NEXT: ret | 40 ; CHECK-NEXT: ret |
| 41 ; MIPS32-LABEL: caller1 |
| 42 ; MIPS32: addiu sp,sp,-52 |
| 43 ; MIPS32: sw ra,48(sp) |
| 44 ; MIPS32: move v0,a0 |
| 45 ; MIPS32: sw v0,16(sp) |
| 46 ; MIPS32: addiu v0,sp,16 |
| 47 ; MIPS32: sw v0,16(sp) |
| 48 ; MIPS32: addiu a1,sp,16 |
| 49 ; MIPS32: addiu a2,sp,16 |
| 50 ; MIPS32: addiu a3,sp,16 |
| 51 ; MIPS32: jal |
| 52 ; MIPS32: nop |
| 53 ; MIPS32: lw ra,48(sp) |
| 54 ; MIPS32: addiu sp,sp,52 |
| 55 ; MIPS32: jr ra |
35 | 56 |
36 ; Test that alloca base addresses get passed correctly to functions. | 57 ; Test that alloca base addresses get passed correctly to functions. |
37 define internal void @caller2(i32 %arg) { | 58 define internal void @caller2(i32 %arg) { |
38 entry: | 59 entry: |
39 %a1 = alloca i8, i32 32, align 4 | 60 %a1 = alloca i8, i32 32, align 4 |
40 %a2 = alloca i8, i32 32, align 4 | 61 %a2 = alloca i8, i32 32, align 4 |
41 %p1 = bitcast i8* %a1 to i32* | 62 %p1 = bitcast i8* %a1 to i32* |
42 %p2 = bitcast i8* %a2 to i32* | 63 %p2 = bitcast i8* %a2 to i32* |
43 store i32 %arg, i32* %p1, align 1 | 64 store i32 %arg, i32* %p1, align 1 |
44 store i32 %arg, i32* %p2, align 1 | 65 store i32 %arg, i32* %p2, align 1 |
(...skipping 11 matching lines...) Expand all Loading... |
56 ; CHECK-NEXT: mov DWORD PTR [esp+0x4],eax | 77 ; CHECK-NEXT: mov DWORD PTR [esp+0x4],eax |
57 ; CHECK-NEXT: lea eax,[esp+0x40] | 78 ; CHECK-NEXT: lea eax,[esp+0x40] |
58 ; CHECK-NEXT: mov DWORD PTR [esp+0x8],eax | 79 ; CHECK-NEXT: mov DWORD PTR [esp+0x8],eax |
59 ; CHECK-NEXT: lea eax,[esp+0x20] | 80 ; CHECK-NEXT: lea eax,[esp+0x20] |
60 ; CHECK-NEXT: mov DWORD PTR [esp+0xc],eax | 81 ; CHECK-NEXT: mov DWORD PTR [esp+0xc],eax |
61 ; CHECK-NEXT: lea eax,[esp+0x40] | 82 ; CHECK-NEXT: lea eax,[esp+0x40] |
62 ; CHECK-NEXT: mov DWORD PTR [esp+0x10],eax | 83 ; CHECK-NEXT: mov DWORD PTR [esp+0x10],eax |
63 ; CHECK-NEXT: call | 84 ; CHECK-NEXT: call |
64 ; CHECK-NEXT: add esp,0x6c | 85 ; CHECK-NEXT: add esp,0x6c |
65 ; CHECK-NEXT: ret | 86 ; CHECK-NEXT: ret |
| 87 ; MIPS32-LABEL: caller2 |
| 88 ; MIPS32: addiu sp,sp,-84 |
| 89 ; MIPS32: sw ra,80(sp) |
| 90 ; MIPS32: move v0,a0 |
| 91 ; MIPS32: sw v0,16(sp) |
| 92 ; MIPS32: move v0,a0 |
| 93 ; MIPS32: sw v0,48(sp) |
| 94 ; MIPS32: addiu v0,sp,48 |
| 95 ; MIPS32: sw v0,16(sp) |
| 96 ; MIPS32: addiu a1,sp,16 |
| 97 ; MIPS32: addiu a2,sp,48 |
| 98 ; MIPS32: addiu a3,sp,16 |
| 99 ; MIPS32: jal |
| 100 ; MIPS32: nop |
| 101 ; MIPS32: lw ra,80(sp) |
| 102 ; MIPS32: addiu sp,sp,84 |
| 103 ; MIPS32: jr ra |
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