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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_REGISTER_CONFIGURATION_H_ | 5 #ifndef V8_COMPILER_REGISTER_CONFIGURATION_H_ |
6 #define V8_COMPILER_REGISTER_CONFIGURATION_H_ | 6 #define V8_COMPILER_REGISTER_CONFIGURATION_H_ |
7 | 7 |
8 #include "src/base/macros.h" | 8 #include "src/base/macros.h" |
9 #include "src/machine-type.h" | 9 #include "src/machine-type.h" |
10 | 10 |
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28 | 28 |
29 // Default RegisterConfigurations for the target architecture. | 29 // Default RegisterConfigurations for the target architecture. |
30 // TODO(X87): This distinction in RegisterConfigurations is temporary | 30 // TODO(X87): This distinction in RegisterConfigurations is temporary |
31 // until x87 TF supports all of the registers that Crankshaft does. | 31 // until x87 TF supports all of the registers that Crankshaft does. |
32 static const RegisterConfiguration* Crankshaft(); | 32 static const RegisterConfiguration* Crankshaft(); |
33 static const RegisterConfiguration* Turbofan(); | 33 static const RegisterConfiguration* Turbofan(); |
34 | 34 |
35 RegisterConfiguration(int num_general_registers, int num_double_registers, | 35 RegisterConfiguration(int num_general_registers, int num_double_registers, |
36 int num_allocatable_general_registers, | 36 int num_allocatable_general_registers, |
37 int num_allocatable_double_registers, | 37 int num_allocatable_double_registers, |
38 int num_allocatable_aliased_double_registers, | |
39 const int* allocatable_general_codes, | 38 const int* allocatable_general_codes, |
40 const int* allocatable_double_codes, | 39 const int* allocatable_double_codes, |
41 AliasingKind fp_aliasing_kind, | 40 AliasingKind fp_aliasing_kind, |
42 char const* const* general_names, | 41 char const* const* general_names, |
43 char const* const* float_names, | 42 char const* const* float_names, |
44 char const* const* double_names, | 43 char const* const* double_names, |
45 char const* const* simd128_names); | 44 char const* const* simd128_names); |
46 | 45 |
47 int num_general_registers() const { return num_general_registers_; } | 46 int num_general_registers() const { return num_general_registers_; } |
48 int num_float_registers() const { return num_float_registers_; } | 47 int num_float_registers() const { return num_float_registers_; } |
49 int num_double_registers() const { return num_double_registers_; } | 48 int num_double_registers() const { return num_double_registers_; } |
50 int num_simd128_registers() const { return num_simd128_registers_; } | 49 int num_simd128_registers() const { return num_simd128_registers_; } |
51 int num_allocatable_general_registers() const { | 50 int num_allocatable_general_registers() const { |
52 return num_allocatable_general_registers_; | 51 return num_allocatable_general_registers_; |
53 } | 52 } |
54 int num_allocatable_float_registers() const { | 53 int num_allocatable_float_registers() const { |
55 return num_allocatable_float_registers_; | 54 return num_allocatable_float_registers_; |
56 } | 55 } |
57 int num_allocatable_double_registers() const { | 56 int num_allocatable_double_registers() const { |
58 return num_allocatable_double_registers_; | 57 return num_allocatable_double_registers_; |
59 } | 58 } |
60 // TODO(bbudge): This is a temporary work-around required because our | |
61 // register allocator does not yet support the aliasing of single/double | |
62 // registers on ARM. | |
63 int num_allocatable_aliased_double_registers() const { | |
64 return num_allocatable_aliased_double_registers_; | |
65 } | |
66 int num_allocatable_simd128_registers() const { | 59 int num_allocatable_simd128_registers() const { |
67 return num_allocatable_simd128_registers_; | 60 return num_allocatable_simd128_registers_; |
68 } | 61 } |
69 AliasingKind fp_aliasing_kind() const { return fp_aliasing_kind_; } | 62 AliasingKind fp_aliasing_kind() const { return fp_aliasing_kind_; } |
70 int32_t allocatable_general_codes_mask() const { | 63 int32_t allocatable_general_codes_mask() const { |
71 return allocatable_general_codes_mask_; | 64 return allocatable_general_codes_mask_; |
72 } | 65 } |
73 int32_t allocatable_double_codes_mask() const { | 66 int32_t allocatable_double_codes_mask() const { |
74 return allocatable_double_codes_mask_; | 67 return allocatable_double_codes_mask_; |
75 } | 68 } |
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135 MachineRepresentation other_rep, int other_index) const; | 128 MachineRepresentation other_rep, int other_index) const; |
136 | 129 |
137 private: | 130 private: |
138 const int num_general_registers_; | 131 const int num_general_registers_; |
139 int num_float_registers_; | 132 int num_float_registers_; |
140 const int num_double_registers_; | 133 const int num_double_registers_; |
141 int num_simd128_registers_; | 134 int num_simd128_registers_; |
142 int num_allocatable_general_registers_; | 135 int num_allocatable_general_registers_; |
143 int num_allocatable_float_registers_; | 136 int num_allocatable_float_registers_; |
144 int num_allocatable_double_registers_; | 137 int num_allocatable_double_registers_; |
145 int num_allocatable_aliased_double_registers_; | |
146 int num_allocatable_simd128_registers_; | 138 int num_allocatable_simd128_registers_; |
147 int32_t allocatable_general_codes_mask_; | 139 int32_t allocatable_general_codes_mask_; |
148 int32_t allocatable_float_codes_mask_; | 140 int32_t allocatable_float_codes_mask_; |
149 int32_t allocatable_double_codes_mask_; | 141 int32_t allocatable_double_codes_mask_; |
150 int32_t allocatable_simd128_codes_mask_; | 142 int32_t allocatable_simd128_codes_mask_; |
151 const int* allocatable_general_codes_; | 143 const int* allocatable_general_codes_; |
152 int allocatable_float_codes_[kMaxFPRegisters]; | 144 int allocatable_float_codes_[kMaxFPRegisters]; |
153 const int* allocatable_double_codes_; | 145 const int* allocatable_double_codes_; |
154 int allocatable_simd128_codes_[kMaxFPRegisters]; | 146 int allocatable_simd128_codes_[kMaxFPRegisters]; |
155 AliasingKind fp_aliasing_kind_; | 147 AliasingKind fp_aliasing_kind_; |
156 char const* const* general_register_names_; | 148 char const* const* general_register_names_; |
157 char const* const* float_register_names_; | 149 char const* const* float_register_names_; |
158 char const* const* double_register_names_; | 150 char const* const* double_register_names_; |
159 char const* const* simd128_register_names_; | 151 char const* const* simd128_register_names_; |
160 }; | 152 }; |
161 | 153 |
162 } // namespace internal | 154 } // namespace internal |
163 } // namespace v8 | 155 } // namespace v8 |
164 | 156 |
165 #endif // V8_COMPILER_REGISTER_CONFIGURATION_H_ | 157 #endif // V8_COMPILER_REGISTER_CONFIGURATION_H_ |
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