[Turbofan] Add concept of FP register aliasing on ARM 32.

src/compiler/wasm-linkage.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/assembler.h"
 #include "src/base/lazy-instance.h"
 #include "src/macro-assembler.h"
 #include "src/register-configuration.h"
 
 #include "src/wasm/wasm-module.h"
@@ skipping 160 matching lines @@
   int fp_offset;
   const DoubleRegister* fp_regs;
 
   int stack_offset;
 
   LinkageLocation Next(LocalType type) {
     if (IsFloatingPoint(type)) {
       // Allocate a floating point register/stack location.
       if (fp_offset < fp_count) {
         DoubleRegister reg = fp_regs[fp_offset++];
+#if V8_TARGET_ARCH_ARM
+        // Allocate floats using a double register, but modify the code to
+        // reflect how ARM FP registers alias.
+        // TODO(bbudge) Modify wasm linkage to allow use of all float regs.
+        if (type == kAstF32) {
+          int float_reg_code = reg.code() * 2;
+          DCHECK(float_reg_code < RegisterConfiguration::kMaxFPRegisters);
+          return regloc(DoubleRegister::from_code(float_reg_code),
+                        MachineTypeFor(type));
+        }
+#endif
         return regloc(reg, MachineTypeFor(type));
       } else {
         int offset = -1 - stack_offset;
         stack_offset += Words(type);
         return stackloc(offset, MachineTypeFor(type));
       }
     } else {
       // Allocate a general purpose register/stack location.
       if (gp_offset < gp_count) {
         return regloc(gp_regs[gp_offset++], MachineTypeFor(type));
@@ skipping 178 matching lines @@
       descriptor->CalleeSavedFPRegisters(),  // callee-saved fp regs
       descriptor->flags(),                   // flags
       descriptor->debug_name());
 
   return descriptor;
 }
 
 }  // namespace wasm
 }  // namespace internal
 }  // namespace v8