OLD | NEW |
---|---|
1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
6 #include "src/compiler/linkage.h" | 6 #include "src/compiler/linkage.h" |
7 #include "src/compiler/register-allocator.h" | 7 #include "src/compiler/register-allocator.h" |
8 #include "src/string-stream.h" | 8 #include "src/string-stream.h" |
9 | 9 |
10 namespace v8 { | 10 namespace v8 { |
(...skipping 15 matching lines...) Expand all Loading... | |
26 } | 26 } |
27 | 27 |
28 int GetRegisterCount(const RegisterConfiguration* cfg, RegisterKind kind) { | 28 int GetRegisterCount(const RegisterConfiguration* cfg, RegisterKind kind) { |
29 return kind == FP_REGISTERS ? cfg->num_double_registers() | 29 return kind == FP_REGISTERS ? cfg->num_double_registers() |
30 : cfg->num_general_registers(); | 30 : cfg->num_general_registers(); |
31 } | 31 } |
32 | 32 |
33 | 33 |
34 int GetAllocatableRegisterCount(const RegisterConfiguration* cfg, | 34 int GetAllocatableRegisterCount(const RegisterConfiguration* cfg, |
35 RegisterKind kind) { | 35 RegisterKind kind) { |
36 return kind == FP_REGISTERS ? cfg->num_allocatable_aliased_double_registers() | 36 return kind == FP_REGISTERS ? cfg->num_allocatable_double_registers() |
37 : cfg->num_allocatable_general_registers(); | 37 : cfg->num_allocatable_general_registers(); |
38 } | 38 } |
39 | 39 |
40 | 40 |
41 const int* GetAllocatableRegisterCodes(const RegisterConfiguration* cfg, | 41 const int* GetAllocatableRegisterCodes(const RegisterConfiguration* cfg, |
42 RegisterKind kind) { | 42 RegisterKind kind) { |
43 return kind == FP_REGISTERS ? cfg->allocatable_double_codes() | 43 return kind == FP_REGISTERS ? cfg->allocatable_double_codes() |
44 : cfg->allocatable_general_codes(); | 44 : cfg->allocatable_general_codes(); |
45 } | 45 } |
46 | 46 |
(...skipping 20 matching lines...) Expand all Loading... | |
67 // TODO(dcarney): fix frame to allow frame accesses to half size location. | 67 // TODO(dcarney): fix frame to allow frame accesses to half size location. |
68 int GetByteWidth(MachineRepresentation rep) { | 68 int GetByteWidth(MachineRepresentation rep) { |
69 switch (rep) { | 69 switch (rep) { |
70 case MachineRepresentation::kBit: | 70 case MachineRepresentation::kBit: |
71 case MachineRepresentation::kWord8: | 71 case MachineRepresentation::kWord8: |
72 case MachineRepresentation::kWord16: | 72 case MachineRepresentation::kWord16: |
73 case MachineRepresentation::kWord32: | 73 case MachineRepresentation::kWord32: |
74 case MachineRepresentation::kTaggedSigned: | 74 case MachineRepresentation::kTaggedSigned: |
75 case MachineRepresentation::kTaggedPointer: | 75 case MachineRepresentation::kTaggedPointer: |
76 case MachineRepresentation::kTagged: | 76 case MachineRepresentation::kTagged: |
77 case MachineRepresentation::kFloat32: | |
77 return kPointerSize; | 78 return kPointerSize; |
78 case MachineRepresentation::kFloat32: | |
79 // TODO(bbudge) Eliminate this when FP register aliasing works. | |
80 #if V8_TARGET_ARCH_ARM | |
81 return kDoubleSize; | |
82 #else | |
83 return kPointerSize; | |
84 #endif | |
85 case MachineRepresentation::kWord64: | 79 case MachineRepresentation::kWord64: |
86 case MachineRepresentation::kFloat64: | 80 case MachineRepresentation::kFloat64: |
87 return kDoubleSize; | 81 return kDoubleSize; |
88 case MachineRepresentation::kSimd128: | 82 case MachineRepresentation::kSimd128: |
89 return kSimd128Size; | 83 return kSimd128Size; |
90 case MachineRepresentation::kNone: | 84 case MachineRepresentation::kNone: |
91 break; | 85 break; |
92 } | 86 } |
93 UNREACHABLE(); | 87 UNREACHABLE(); |
94 return 0; | 88 return 0; |
(...skipping 396 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
491 | 485 |
492 UsePosition* LiveRange::NextUsePositionRegisterIsBeneficial( | 486 UsePosition* LiveRange::NextUsePositionRegisterIsBeneficial( |
493 LifetimePosition start) const { | 487 LifetimePosition start) const { |
494 UsePosition* pos = NextUsePosition(start); | 488 UsePosition* pos = NextUsePosition(start); |
495 while (pos != nullptr && !pos->RegisterIsBeneficial()) { | 489 while (pos != nullptr && !pos->RegisterIsBeneficial()) { |
496 pos = pos->next(); | 490 pos = pos->next(); |
497 } | 491 } |
498 return pos; | 492 return pos; |
499 } | 493 } |
500 | 494 |
495 LifetimePosition LiveRange::NextLifetimePositionRegisterIsBeneficial( | |
496 const LifetimePosition& start) const { | |
497 UsePosition* next_use = NextUsePositionRegisterIsBeneficial(start); | |
498 if (next_use == nullptr) return End(); | |
499 return next_use->pos(); | |
500 } | |
501 | 501 |
502 UsePosition* LiveRange::PreviousUsePositionRegisterIsBeneficial( | 502 UsePosition* LiveRange::PreviousUsePositionRegisterIsBeneficial( |
503 LifetimePosition start) const { | 503 LifetimePosition start) const { |
504 UsePosition* pos = first_pos(); | 504 UsePosition* pos = first_pos(); |
505 UsePosition* prev = nullptr; | 505 UsePosition* prev = nullptr; |
506 while (pos != nullptr && pos->pos() < start) { | 506 while (pos != nullptr && pos->pos() < start) { |
507 if (pos->RegisterIsBeneficial()) prev = pos; | 507 if (pos->RegisterIsBeneficial()) prev = pos; |
508 pos = pos->next(); | 508 pos = pos->next(); |
509 } | 509 } |
510 return prev; | 510 return prev; |
(...skipping 842 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
1353 code_(code), | 1353 code_(code), |
1354 debug_name_(debug_name), | 1354 debug_name_(debug_name), |
1355 config_(config), | 1355 config_(config), |
1356 phi_map_(allocation_zone()), | 1356 phi_map_(allocation_zone()), |
1357 live_in_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()), | 1357 live_in_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()), |
1358 live_out_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()), | 1358 live_out_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()), |
1359 live_ranges_(code->VirtualRegisterCount() * 2, nullptr, | 1359 live_ranges_(code->VirtualRegisterCount() * 2, nullptr, |
1360 allocation_zone()), | 1360 allocation_zone()), |
1361 fixed_live_ranges_(this->config()->num_general_registers(), nullptr, | 1361 fixed_live_ranges_(this->config()->num_general_registers(), nullptr, |
1362 allocation_zone()), | 1362 allocation_zone()), |
1363 fixed_float_live_ranges_(this->config()->num_float_registers(), nullptr, | |
1364 allocation_zone()), | |
1363 fixed_double_live_ranges_(this->config()->num_double_registers(), nullptr, | 1365 fixed_double_live_ranges_(this->config()->num_double_registers(), nullptr, |
1364 allocation_zone()), | 1366 allocation_zone()), |
1367 fixed_simd128_live_ranges_(this->config()->num_simd128_registers(), | |
1368 nullptr, allocation_zone()), | |
1365 spill_ranges_(code->VirtualRegisterCount(), nullptr, allocation_zone()), | 1369 spill_ranges_(code->VirtualRegisterCount(), nullptr, allocation_zone()), |
1366 delayed_references_(allocation_zone()), | 1370 delayed_references_(allocation_zone()), |
1367 assigned_registers_(nullptr), | 1371 assigned_registers_(nullptr), |
1368 assigned_double_registers_(nullptr), | 1372 assigned_double_registers_(nullptr), |
1369 virtual_register_count_(code->VirtualRegisterCount()), | 1373 virtual_register_count_(code->VirtualRegisterCount()), |
1370 preassigned_slot_ranges_(zone) { | 1374 preassigned_slot_ranges_(zone) { |
1371 assigned_registers_ = new (code_zone()) | 1375 assigned_registers_ = new (code_zone()) |
1372 BitVector(this->config()->num_general_registers(), code_zone()); | 1376 BitVector(this->config()->num_general_registers(), code_zone()); |
1373 assigned_double_registers_ = new (code_zone()) | 1377 assigned_double_registers_ = new (code_zone()) |
1374 BitVector(this->config()->num_double_registers(), code_zone()); | 1378 BitVector(this->config()->num_double_registers(), code_zone()); |
(...skipping 157 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
1532 DCHECK(!range->IsSplinter()); | 1536 DCHECK(!range->IsSplinter()); |
1533 SpillRange* spill_range = | 1537 SpillRange* spill_range = |
1534 new (allocation_zone()) SpillRange(range, allocation_zone()); | 1538 new (allocation_zone()) SpillRange(range, allocation_zone()); |
1535 return spill_range; | 1539 return spill_range; |
1536 } | 1540 } |
1537 | 1541 |
1538 void RegisterAllocationData::MarkAllocated(MachineRepresentation rep, | 1542 void RegisterAllocationData::MarkAllocated(MachineRepresentation rep, |
1539 int index) { | 1543 int index) { |
1540 switch (rep) { | 1544 switch (rep) { |
1541 case MachineRepresentation::kFloat32: | 1545 case MachineRepresentation::kFloat32: |
1546 case MachineRepresentation::kSimd128: | |
1547 if (kSimpleFPAliasing) { | |
1548 assigned_double_registers_->Add(index); | |
1549 } else { | |
1550 int alias_base_index = -1; | |
1551 int aliases = config()->GetAliases( | |
1552 rep, index, MachineRepresentation::kFloat64, &alias_base_index); | |
1553 DCHECK(aliases > 0 || (aliases == 0 && alias_base_index == -1)); | |
1554 while (aliases--) { | |
1555 int aliased_reg = alias_base_index + aliases; | |
1556 assigned_double_registers_->Add(aliased_reg); | |
1557 } | |
1558 } | |
1559 break; | |
1542 case MachineRepresentation::kFloat64: | 1560 case MachineRepresentation::kFloat64: |
1543 case MachineRepresentation::kSimd128: | |
1544 assigned_double_registers_->Add(index); | 1561 assigned_double_registers_->Add(index); |
1545 break; | 1562 break; |
1546 default: | 1563 default: |
1547 DCHECK(!IsFloatingPoint(rep)); | 1564 DCHECK(!IsFloatingPoint(rep)); |
1548 assigned_registers_->Add(index); | 1565 assigned_registers_->Add(index); |
1549 break; | 1566 break; |
1550 } | 1567 } |
1551 } | 1568 } |
1552 | 1569 |
1553 bool RegisterAllocationData::IsBlockBoundary(LifetimePosition pos) const { | 1570 bool RegisterAllocationData::IsBlockBoundary(LifetimePosition pos) const { |
(...skipping 306 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
1860 TopLevelLiveRange* range = data()->GetOrCreateLiveRangeFor(operand_index); | 1877 TopLevelLiveRange* range = data()->GetOrCreateLiveRangeFor(operand_index); |
1861 range->AddUseInterval(start, end, allocation_zone()); | 1878 range->AddUseInterval(start, end, allocation_zone()); |
1862 iterator.Advance(); | 1879 iterator.Advance(); |
1863 } | 1880 } |
1864 } | 1881 } |
1865 | 1882 |
1866 int LiveRangeBuilder::FixedFPLiveRangeID(int index, MachineRepresentation rep) { | 1883 int LiveRangeBuilder::FixedFPLiveRangeID(int index, MachineRepresentation rep) { |
1867 int result = -index - 1; | 1884 int result = -index - 1; |
1868 switch (rep) { | 1885 switch (rep) { |
1869 case MachineRepresentation::kSimd128: | 1886 case MachineRepresentation::kSimd128: |
1887 result -= config()->num_float_registers(); | |
1888 // Fall through. | |
1870 case MachineRepresentation::kFloat32: | 1889 case MachineRepresentation::kFloat32: |
1890 result -= config()->num_double_registers(); | |
1891 // Fall through. | |
1871 case MachineRepresentation::kFloat64: | 1892 case MachineRepresentation::kFloat64: |
1872 result -= config()->num_general_registers(); | 1893 result -= config()->num_general_registers(); |
1873 break; | 1894 break; |
1874 default: | 1895 default: |
1875 UNREACHABLE(); | 1896 UNREACHABLE(); |
1876 break; | 1897 break; |
1877 } | 1898 } |
1878 return result; | 1899 return result; |
1879 } | 1900 } |
1880 | 1901 |
1881 TopLevelLiveRange* LiveRangeBuilder::FixedLiveRangeFor(int index) { | 1902 TopLevelLiveRange* LiveRangeBuilder::FixedLiveRangeFor(int index) { |
1882 DCHECK(index < config()->num_general_registers()); | 1903 DCHECK(index < config()->num_general_registers()); |
1883 TopLevelLiveRange* result = data()->fixed_live_ranges()[index]; | 1904 TopLevelLiveRange* result = data()->fixed_live_ranges()[index]; |
1884 if (result == nullptr) { | 1905 if (result == nullptr) { |
1885 MachineRepresentation rep = InstructionSequence::DefaultRepresentation(); | 1906 MachineRepresentation rep = InstructionSequence::DefaultRepresentation(); |
1886 result = data()->NewLiveRange(FixedLiveRangeID(index), rep); | 1907 result = data()->NewLiveRange(FixedLiveRangeID(index), rep); |
1887 DCHECK(result->IsFixed()); | 1908 DCHECK(result->IsFixed()); |
1888 result->set_assigned_register(index); | 1909 result->set_assigned_register(index); |
1889 data()->MarkAllocated(rep, index); | 1910 data()->MarkAllocated(rep, index); |
1890 data()->fixed_live_ranges()[index] = result; | 1911 data()->fixed_live_ranges()[index] = result; |
1891 } | 1912 } |
1892 return result; | 1913 return result; |
1893 } | 1914 } |
1894 | 1915 |
1895 TopLevelLiveRange* LiveRangeBuilder::FixedFPLiveRangeFor( | 1916 TopLevelLiveRange* LiveRangeBuilder::FixedFPLiveRangeFor( |
1896 int index, MachineRepresentation rep) { | 1917 int index, MachineRepresentation rep) { |
1897 TopLevelLiveRange* result = nullptr; | 1918 int num_regs = -1; |
1919 ZoneVector<TopLevelLiveRange*>* live_ranges = nullptr; | |
1898 switch (rep) { | 1920 switch (rep) { |
1899 case MachineRepresentation::kFloat32: | 1921 case MachineRepresentation::kFloat32: |
1922 num_regs = config()->num_float_registers(); | |
1923 live_ranges = &data()->fixed_float_live_ranges(); | |
1924 break; | |
1900 case MachineRepresentation::kFloat64: | 1925 case MachineRepresentation::kFloat64: |
1926 num_regs = config()->num_double_registers(); | |
1927 live_ranges = &data()->fixed_double_live_ranges(); | |
1928 break; | |
1901 case MachineRepresentation::kSimd128: | 1929 case MachineRepresentation::kSimd128: |
1902 DCHECK(index < config()->num_double_registers()); | 1930 num_regs = config()->num_simd128_registers(); |
1903 result = data()->fixed_double_live_ranges()[index]; | 1931 live_ranges = &data()->fixed_simd128_live_ranges(); |
1904 if (result == nullptr) { | |
1905 result = data()->NewLiveRange(FixedFPLiveRangeID(index, rep), rep); | |
1906 DCHECK(result->IsFixed()); | |
1907 result->set_assigned_register(index); | |
1908 data()->MarkAllocated(rep, index); | |
1909 data()->fixed_double_live_ranges()[index] = result; | |
1910 } | |
1911 break; | 1932 break; |
1912 default: | 1933 default: |
1913 UNREACHABLE(); | 1934 UNREACHABLE(); |
1914 break; | 1935 break; |
1915 } | 1936 } |
1937 | |
1938 DCHECK(index < num_regs); | |
1939 TopLevelLiveRange* result = (*live_ranges)[index]; | |
1940 if (result == nullptr) { | |
1941 result = data()->NewLiveRange(FixedFPLiveRangeID(index, rep), rep); | |
1942 DCHECK(result->IsFixed()); | |
1943 result->set_assigned_register(index); | |
1944 data()->MarkAllocated(rep, index); | |
1945 (*live_ranges)[index] = result; | |
1946 } | |
1916 return result; | 1947 return result; |
1917 } | 1948 } |
1918 | 1949 |
1919 TopLevelLiveRange* LiveRangeBuilder::LiveRangeFor(InstructionOperand* operand) { | 1950 TopLevelLiveRange* LiveRangeBuilder::LiveRangeFor(InstructionOperand* operand) { |
1920 if (operand->IsUnallocated()) { | 1951 if (operand->IsUnallocated()) { |
1921 return data()->GetOrCreateLiveRangeFor( | 1952 return data()->GetOrCreateLiveRangeFor( |
1922 UnallocatedOperand::cast(operand)->virtual_register()); | 1953 UnallocatedOperand::cast(operand)->virtual_register()); |
1923 } else if (operand->IsConstant()) { | 1954 } else if (operand->IsConstant()) { |
1924 return data()->GetOrCreateLiveRangeFor( | 1955 return data()->GetOrCreateLiveRangeFor( |
1925 ConstantOperand::cast(operand)->virtual_register()); | 1956 ConstantOperand::cast(operand)->virtual_register()); |
(...skipping 102 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
2028 // is OK because AddUseInterval will just merge it with the existing | 2059 // is OK because AddUseInterval will just merge it with the existing |
2029 // one at the end of the range. | 2060 // one at the end of the range. |
2030 int code = config()->GetAllocatableGeneralCode(i); | 2061 int code = config()->GetAllocatableGeneralCode(i); |
2031 TopLevelLiveRange* range = FixedLiveRangeFor(code); | 2062 TopLevelLiveRange* range = FixedLiveRangeFor(code); |
2032 range->AddUseInterval(curr_position, curr_position.End(), | 2063 range->AddUseInterval(curr_position, curr_position.End(), |
2033 allocation_zone()); | 2064 allocation_zone()); |
2034 } | 2065 } |
2035 } | 2066 } |
2036 | 2067 |
2037 if (instr->ClobbersDoubleRegisters()) { | 2068 if (instr->ClobbersDoubleRegisters()) { |
2038 for (int i = 0; i < config()->num_allocatable_aliased_double_registers(); | 2069 for (int i = 0; i < config()->num_allocatable_double_registers(); ++i) { |
2039 ++i) { | |
2040 // Add a UseInterval for all DoubleRegisters. See comment above for | 2070 // Add a UseInterval for all DoubleRegisters. See comment above for |
2041 // general registers. | 2071 // general registers. |
2042 int code = config()->GetAllocatableDoubleCode(i); | 2072 int code = config()->GetAllocatableDoubleCode(i); |
2043 TopLevelLiveRange* range = | 2073 TopLevelLiveRange* range = |
2044 FixedFPLiveRangeFor(code, MachineRepresentation::kFloat64); | 2074 FixedFPLiveRangeFor(code, MachineRepresentation::kFloat64); |
2045 range->AddUseInterval(curr_position, curr_position.End(), | 2075 range->AddUseInterval(curr_position, curr_position.End(), |
2046 allocation_zone()); | 2076 allocation_zone()); |
2047 } | 2077 } |
2078 // Preserve fixed float registers on archs with non-simple aliasing. | |
Jarin
2016/10/18 11:44:28
Preserve -> Clobber?
bbudge
2016/10/19 00:32:21
Done.
| |
2079 if (!kSimpleFPAliasing) { | |
2080 for (int i = 0; i < config()->num_allocatable_float_registers(); ++i) { | |
2081 // Add a UseInterval for all FloatRegisters. See comment above for | |
2082 // general registers. | |
2083 int code = config()->GetAllocatableFloatCode(i); | |
2084 TopLevelLiveRange* range = | |
2085 FixedFPLiveRangeFor(code, MachineRepresentation::kFloat32); | |
2086 range->AddUseInterval(curr_position, curr_position.End(), | |
2087 allocation_zone()); | |
2088 } | |
2089 for (int i = 0; i < config()->num_allocatable_simd128_registers(); | |
2090 ++i) { | |
2091 int code = config()->GetAllocatableSimd128Code(i); | |
2092 TopLevelLiveRange* range = | |
2093 FixedFPLiveRangeFor(code, MachineRepresentation::kSimd128); | |
2094 range->AddUseInterval(curr_position, curr_position.End(), | |
2095 allocation_zone()); | |
2096 } | |
2097 } | |
2048 } | 2098 } |
2049 | 2099 |
2050 for (size_t i = 0; i < instr->InputCount(); i++) { | 2100 for (size_t i = 0; i < instr->InputCount(); i++) { |
2051 InstructionOperand* input = instr->InputAt(i); | 2101 InstructionOperand* input = instr->InputAt(i); |
2052 if (input->IsImmediate() || input->IsExplicit()) { | 2102 if (input->IsImmediate() || input->IsExplicit()) { |
2053 continue; // Ignore immediates and explicitly reserved registers. | 2103 continue; // Ignore immediates and explicitly reserved registers. |
2054 } | 2104 } |
2055 LifetimePosition use_pos; | 2105 LifetimePosition use_pos; |
2056 if (input->IsUnallocated() && | 2106 if (input->IsUnallocated() && |
2057 UnallocatedOperand::cast(input)->IsUsedAtStart()) { | 2107 UnallocatedOperand::cast(input)->IsUsedAtStart()) { |
(...skipping 546 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
2604 } | 2654 } |
2605 } | 2655 } |
2606 SortUnhandled(); | 2656 SortUnhandled(); |
2607 DCHECK(UnhandledIsSorted()); | 2657 DCHECK(UnhandledIsSorted()); |
2608 | 2658 |
2609 if (mode() == GENERAL_REGISTERS) { | 2659 if (mode() == GENERAL_REGISTERS) { |
2610 for (TopLevelLiveRange* current : data()->fixed_live_ranges()) { | 2660 for (TopLevelLiveRange* current : data()->fixed_live_ranges()) { |
2611 if (current != nullptr) AddToInactive(current); | 2661 if (current != nullptr) AddToInactive(current); |
2612 } | 2662 } |
2613 } else { | 2663 } else { |
2664 for (TopLevelLiveRange* current : data()->fixed_float_live_ranges()) { | |
2665 if (current != nullptr) AddToInactive(current); | |
2666 } | |
2614 for (TopLevelLiveRange* current : data()->fixed_double_live_ranges()) { | 2667 for (TopLevelLiveRange* current : data()->fixed_double_live_ranges()) { |
2615 if (current != nullptr) AddToInactive(current); | 2668 if (current != nullptr) AddToInactive(current); |
2616 } | 2669 } |
2670 for (TopLevelLiveRange* current : data()->fixed_simd128_live_ranges()) { | |
2671 if (current != nullptr) AddToInactive(current); | |
2672 } | |
2617 } | 2673 } |
2618 | 2674 |
2619 while (!unhandled_live_ranges().empty()) { | 2675 while (!unhandled_live_ranges().empty()) { |
2620 DCHECK(UnhandledIsSorted()); | 2676 DCHECK(UnhandledIsSorted()); |
2621 LiveRange* current = unhandled_live_ranges().back(); | 2677 LiveRange* current = unhandled_live_ranges().back(); |
2622 unhandled_live_ranges().pop_back(); | 2678 unhandled_live_ranges().pop_back(); |
2623 DCHECK(UnhandledIsSorted()); | 2679 DCHECK(UnhandledIsSorted()); |
2624 LifetimePosition position = current->Start(); | 2680 LifetimePosition position = current->Start(); |
2625 #ifdef DEBUG | 2681 #ifdef DEBUG |
2626 allocation_finger_ = position; | 2682 allocation_finger_ = position; |
(...skipping 158 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
2785 } | 2841 } |
2786 | 2842 |
2787 | 2843 |
2788 void LinearScanAllocator::InactiveToActive(LiveRange* range) { | 2844 void LinearScanAllocator::InactiveToActive(LiveRange* range) { |
2789 RemoveElement(&inactive_live_ranges(), range); | 2845 RemoveElement(&inactive_live_ranges(), range); |
2790 active_live_ranges().push_back(range); | 2846 active_live_ranges().push_back(range); |
2791 TRACE("Moving live range %d:%d from inactive to active\n", | 2847 TRACE("Moving live range %d:%d from inactive to active\n", |
2792 range->TopLevel()->vreg(), range->relative_id()); | 2848 range->TopLevel()->vreg(), range->relative_id()); |
2793 } | 2849 } |
2794 | 2850 |
2851 void LinearScanAllocator::GetFPRegisterSet(MachineRepresentation rep, | |
2852 int* num_regs, int* num_codes, | |
2853 const int** codes) const { | |
2854 DCHECK(!kSimpleFPAliasing); | |
2855 if (rep == MachineRepresentation::kFloat32) { | |
2856 *num_regs = data()->config()->num_float_registers(); | |
2857 *num_codes = data()->config()->num_allocatable_float_registers(); | |
2858 *codes = data()->config()->allocatable_float_codes(); | |
2859 } else if (rep == MachineRepresentation::kSimd128) { | |
2860 *num_regs = data()->config()->num_simd128_registers(); | |
2861 *num_codes = data()->config()->num_allocatable_simd128_registers(); | |
2862 *codes = data()->config()->allocatable_simd128_codes(); | |
2863 } else { | |
2864 UNREACHABLE(); | |
2865 } | |
2866 } | |
2867 | |
2795 void LinearScanAllocator::FindFreeRegistersForRange( | 2868 void LinearScanAllocator::FindFreeRegistersForRange( |
2796 LiveRange* range, Vector<LifetimePosition> positions) { | 2869 LiveRange* range, Vector<LifetimePosition> positions) { |
2797 int num_regs = num_registers(); | 2870 int num_regs = num_registers(); |
2871 int num_codes = num_allocatable_registers(); | |
2872 const int* codes = allocatable_register_codes(); | |
2873 MachineRepresentation rep = range->representation(); | |
2874 if (!kSimpleFPAliasing && (rep == MachineRepresentation::kFloat32 || | |
2875 rep == MachineRepresentation::kSimd128)) | |
2876 GetFPRegisterSet(rep, &num_regs, &num_codes, &codes); | |
2798 DCHECK_GE(positions.length(), num_regs); | 2877 DCHECK_GE(positions.length(), num_regs); |
2799 | 2878 |
2800 for (int i = 0; i < num_regs; i++) { | 2879 for (int i = 0; i < num_regs; i++) { |
2801 positions[i] = LifetimePosition::MaxPosition(); | 2880 positions[i] = LifetimePosition::MaxPosition(); |
2802 } | 2881 } |
2803 | 2882 |
2804 for (LiveRange* cur_active : active_live_ranges()) { | 2883 for (LiveRange* cur_active : active_live_ranges()) { |
2805 int cur_reg = cur_active->assigned_register(); | 2884 int cur_reg = cur_active->assigned_register(); |
2806 positions[cur_reg] = LifetimePosition::GapFromInstructionIndex(0); | 2885 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) { |
2807 TRACE("Register %s is free until pos %d (1)\n", RegisterName(cur_reg), | 2886 positions[cur_reg] = LifetimePosition::GapFromInstructionIndex(0); |
2808 LifetimePosition::GapFromInstructionIndex(0).value()); | 2887 TRACE("Register %s is free until pos %d (1)\n", RegisterName(cur_reg), |
2888 LifetimePosition::GapFromInstructionIndex(0).value()); | |
2889 } else { | |
2890 int alias_base_index = -1; | |
2891 int aliases = data()->config()->GetAliases( | |
2892 cur_active->representation(), cur_reg, rep, &alias_base_index); | |
2893 DCHECK(aliases > 0 || (aliases == 0 && alias_base_index == -1)); | |
2894 while (aliases--) { | |
2895 int aliased_reg = alias_base_index + aliases; | |
2896 positions[aliased_reg] = LifetimePosition::GapFromInstructionIndex(0); | |
2897 } | |
2898 } | |
2809 } | 2899 } |
2810 | 2900 |
2811 for (LiveRange* cur_inactive : inactive_live_ranges()) { | 2901 for (LiveRange* cur_inactive : inactive_live_ranges()) { |
2812 DCHECK(cur_inactive->End() > range->Start()); | 2902 DCHECK(cur_inactive->End() > range->Start()); |
2813 LifetimePosition next_intersection = cur_inactive->FirstIntersection(range); | 2903 LifetimePosition next_intersection = cur_inactive->FirstIntersection(range); |
2814 if (!next_intersection.IsValid()) continue; | 2904 if (!next_intersection.IsValid()) continue; |
2815 int cur_reg = cur_inactive->assigned_register(); | 2905 int cur_reg = cur_inactive->assigned_register(); |
2816 positions[cur_reg] = Min(positions[cur_reg], next_intersection); | 2906 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) { |
2817 TRACE("Register %s is free until pos %d (2)\n", RegisterName(cur_reg), | 2907 positions[cur_reg] = Min(positions[cur_reg], next_intersection); |
2818 Min(positions[cur_reg], next_intersection).value()); | 2908 TRACE("Register %s is free until pos %d (2)\n", RegisterName(cur_reg), |
2909 Min(positions[cur_reg], next_intersection).value()); | |
2910 } else { | |
2911 int alias_base_index = -1; | |
2912 int aliases = data()->config()->GetAliases( | |
2913 cur_inactive->representation(), cur_reg, rep, &alias_base_index); | |
2914 DCHECK(aliases > 0 || (aliases == 0 && alias_base_index == -1)); | |
2915 while (aliases--) { | |
2916 int aliased_reg = alias_base_index + aliases; | |
2917 positions[aliased_reg] = Min(positions[aliased_reg], next_intersection); | |
2918 } | |
2919 } | |
2819 } | 2920 } |
2820 } | 2921 } |
2821 | 2922 |
2822 // High-level register allocation summary: | 2923 // High-level register allocation summary: |
2823 // | 2924 // |
2824 // For regular, or hot (i.e. not splinter) ranges, we attempt to first | 2925 // For regular, or hot (i.e. not splinter) ranges, we attempt to first |
2825 // allocate first the preferred (hint) register. If that is not possible, | 2926 // allocate first the preferred (hint) register. If that is not possible, |
2826 // we find a register that's free, and allocate that. If that's not possible, | 2927 // we find a register that's free, and allocate that. If that's not possible, |
2827 // we search for a register to steal from a range that was allocated. The | 2928 // we search for a register to steal from a range that was allocated. The |
2828 // goal is to optimize for throughput by avoiding register-to-memory | 2929 // goal is to optimize for throughput by avoiding register-to-memory |
(...skipping 60 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
2889 current->relative_id()); | 2990 current->relative_id()); |
2890 SetLiveRangeAssignedRegister(current, hint_register); | 2991 SetLiveRangeAssignedRegister(current, hint_register); |
2891 return true; | 2992 return true; |
2892 } | 2993 } |
2893 } | 2994 } |
2894 return false; | 2995 return false; |
2895 } | 2996 } |
2896 | 2997 |
2897 bool LinearScanAllocator::TryAllocateFreeReg( | 2998 bool LinearScanAllocator::TryAllocateFreeReg( |
2898 LiveRange* current, const Vector<LifetimePosition>& free_until_pos) { | 2999 LiveRange* current, const Vector<LifetimePosition>& free_until_pos) { |
3000 int num_regs = 0; // used only for the call to GetFPRegisterSet. | |
2899 int num_codes = num_allocatable_registers(); | 3001 int num_codes = num_allocatable_registers(); |
2900 const int* codes = allocatable_register_codes(); | 3002 const int* codes = allocatable_register_codes(); |
3003 MachineRepresentation rep = current->representation(); | |
3004 if (!kSimpleFPAliasing && (rep == MachineRepresentation::kFloat32 || | |
3005 rep == MachineRepresentation::kSimd128)) | |
3006 GetFPRegisterSet(rep, &num_regs, &num_codes, &codes); | |
3007 | |
2901 DCHECK_GE(free_until_pos.length(), num_codes); | 3008 DCHECK_GE(free_until_pos.length(), num_codes); |
2902 | 3009 |
2903 // Find the register which stays free for the longest time. | 3010 // Find the register which stays free for the longest time. |
2904 int reg = codes[0]; | 3011 int reg = codes[0]; |
2905 for (int i = 1; i < num_codes; ++i) { | 3012 for (int i = 1; i < num_codes; ++i) { |
2906 int code = codes[i]; | 3013 int code = codes[i]; |
2907 if (free_until_pos[code] > free_until_pos[reg]) { | 3014 if (free_until_pos[code] > free_until_pos[reg]) { |
2908 reg = code; | 3015 reg = code; |
2909 } | 3016 } |
2910 } | 3017 } |
(...skipping 27 matching lines...) Expand all Loading... | |
2938 if (register_use == nullptr) { | 3045 if (register_use == nullptr) { |
2939 // There is no use in the current live range that requires a register. | 3046 // There is no use in the current live range that requires a register. |
2940 // We can just spill it. | 3047 // We can just spill it. |
2941 Spill(current); | 3048 Spill(current); |
2942 return; | 3049 return; |
2943 } | 3050 } |
2944 | 3051 |
2945 int num_regs = num_registers(); | 3052 int num_regs = num_registers(); |
2946 int num_codes = num_allocatable_registers(); | 3053 int num_codes = num_allocatable_registers(); |
2947 const int* codes = allocatable_register_codes(); | 3054 const int* codes = allocatable_register_codes(); |
3055 MachineRepresentation rep = current->representation(); | |
3056 if (!kSimpleFPAliasing && (rep == MachineRepresentation::kFloat32 || | |
3057 rep == MachineRepresentation::kSimd128)) | |
3058 GetFPRegisterSet(rep, &num_regs, &num_codes, &codes); | |
2948 | 3059 |
2949 LifetimePosition use_pos[RegisterConfiguration::kMaxFPRegisters]; | 3060 LifetimePosition use_pos[RegisterConfiguration::kMaxFPRegisters]; |
2950 LifetimePosition block_pos[RegisterConfiguration::kMaxFPRegisters]; | 3061 LifetimePosition block_pos[RegisterConfiguration::kMaxFPRegisters]; |
2951 for (int i = 0; i < num_regs; i++) { | 3062 for (int i = 0; i < num_regs; i++) { |
2952 use_pos[i] = block_pos[i] = LifetimePosition::MaxPosition(); | 3063 use_pos[i] = block_pos[i] = LifetimePosition::MaxPosition(); |
2953 } | 3064 } |
2954 | 3065 |
2955 for (LiveRange* range : active_live_ranges()) { | 3066 for (LiveRange* range : active_live_ranges()) { |
2956 int cur_reg = range->assigned_register(); | 3067 int cur_reg = range->assigned_register(); |
2957 bool is_fixed_or_cant_spill = | 3068 bool is_fixed_or_cant_spill = |
2958 range->TopLevel()->IsFixed() || !range->CanBeSpilled(current->Start()); | 3069 range->TopLevel()->IsFixed() || !range->CanBeSpilled(current->Start()); |
2959 if (is_fixed_or_cant_spill) { | 3070 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) { |
2960 block_pos[cur_reg] = use_pos[cur_reg] = | 3071 if (is_fixed_or_cant_spill) { |
2961 LifetimePosition::GapFromInstructionIndex(0); | 3072 block_pos[cur_reg] = use_pos[cur_reg] = |
3073 LifetimePosition::GapFromInstructionIndex(0); | |
3074 } else { | |
3075 use_pos[cur_reg] = | |
3076 range->NextLifetimePositionRegisterIsBeneficial(current->Start()); | |
3077 } | |
2962 } else { | 3078 } else { |
2963 UsePosition* next_use = | 3079 int alias_base_index = -1; |
2964 range->NextUsePositionRegisterIsBeneficial(current->Start()); | 3080 int aliases = data()->config()->GetAliases( |
2965 if (next_use == nullptr) { | 3081 range->representation(), cur_reg, rep, &alias_base_index); |
2966 use_pos[cur_reg] = range->End(); | 3082 DCHECK(aliases > 0 || (aliases == 0 && alias_base_index == -1)); |
2967 } else { | 3083 while (aliases--) { |
2968 use_pos[cur_reg] = next_use->pos(); | 3084 int aliased_reg = alias_base_index + aliases; |
3085 if (is_fixed_or_cant_spill) { | |
3086 block_pos[aliased_reg] = use_pos[aliased_reg] = | |
3087 LifetimePosition::GapFromInstructionIndex(0); | |
3088 } else { | |
3089 use_pos[aliased_reg] = | |
3090 range->NextLifetimePositionRegisterIsBeneficial(current->Start()); | |
3091 } | |
2969 } | 3092 } |
2970 } | 3093 } |
2971 } | 3094 } |
2972 | 3095 |
2973 for (LiveRange* range : inactive_live_ranges()) { | 3096 for (LiveRange* range : inactive_live_ranges()) { |
2974 DCHECK(range->End() > current->Start()); | 3097 DCHECK(range->End() > current->Start()); |
2975 LifetimePosition next_intersection = range->FirstIntersection(current); | 3098 LifetimePosition next_intersection = range->FirstIntersection(current); |
2976 if (!next_intersection.IsValid()) continue; | 3099 if (!next_intersection.IsValid()) continue; |
2977 int cur_reg = range->assigned_register(); | 3100 int cur_reg = range->assigned_register(); |
2978 bool is_fixed = range->TopLevel()->IsFixed(); | 3101 bool is_fixed = range->TopLevel()->IsFixed(); |
2979 if (is_fixed) { | 3102 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) { |
2980 block_pos[cur_reg] = Min(block_pos[cur_reg], next_intersection); | 3103 if (is_fixed) { |
2981 use_pos[cur_reg] = Min(block_pos[cur_reg], use_pos[cur_reg]); | 3104 block_pos[cur_reg] = Min(block_pos[cur_reg], next_intersection); |
3105 use_pos[cur_reg] = Min(block_pos[cur_reg], use_pos[cur_reg]); | |
3106 } else { | |
3107 use_pos[cur_reg] = Min(use_pos[cur_reg], next_intersection); | |
3108 } | |
2982 } else { | 3109 } else { |
2983 use_pos[cur_reg] = Min(use_pos[cur_reg], next_intersection); | 3110 int alias_base_index = -1; |
3111 int aliases = data()->config()->GetAliases( | |
3112 range->representation(), cur_reg, rep, &alias_base_index); | |
3113 DCHECK(aliases > 0 || (aliases == 0 && alias_base_index == -1)); | |
3114 while (aliases--) { | |
3115 int aliased_reg = alias_base_index + aliases; | |
3116 if (is_fixed) { | |
3117 block_pos[aliased_reg] = | |
3118 Min(block_pos[aliased_reg], next_intersection); | |
3119 use_pos[aliased_reg] = | |
3120 Min(block_pos[aliased_reg], use_pos[aliased_reg]); | |
3121 } else { | |
3122 use_pos[aliased_reg] = Min(use_pos[aliased_reg], next_intersection); | |
3123 } | |
3124 } | |
2984 } | 3125 } |
2985 } | 3126 } |
2986 | 3127 |
2987 int reg = codes[0]; | 3128 int reg = codes[0]; |
2988 for (int i = 1; i < num_codes; ++i) { | 3129 for (int i = 1; i < num_codes; ++i) { |
2989 int code = codes[i]; | 3130 int code = codes[i]; |
2990 if (use_pos[code] > use_pos[reg]) { | 3131 if (use_pos[code] > use_pos[reg]) { |
2991 reg = code; | 3132 reg = code; |
2992 } | 3133 } |
2993 } | 3134 } |
(...skipping 31 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
3025 SplitAndSpillIntersecting(current); | 3166 SplitAndSpillIntersecting(current); |
3026 } | 3167 } |
3027 | 3168 |
3028 | 3169 |
3029 void LinearScanAllocator::SplitAndSpillIntersecting(LiveRange* current) { | 3170 void LinearScanAllocator::SplitAndSpillIntersecting(LiveRange* current) { |
3030 DCHECK(current->HasRegisterAssigned()); | 3171 DCHECK(current->HasRegisterAssigned()); |
3031 int reg = current->assigned_register(); | 3172 int reg = current->assigned_register(); |
3032 LifetimePosition split_pos = current->Start(); | 3173 LifetimePosition split_pos = current->Start(); |
3033 for (size_t i = 0; i < active_live_ranges().size(); ++i) { | 3174 for (size_t i = 0; i < active_live_ranges().size(); ++i) { |
3034 LiveRange* range = active_live_ranges()[i]; | 3175 LiveRange* range = active_live_ranges()[i]; |
3035 if (range->assigned_register() != reg) continue; | 3176 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) { |
3177 if (range->assigned_register() != reg) continue; | |
3178 } else { | |
3179 if (!data()->config()->AreAliases(current->representation(), reg, | |
3180 range->representation(), | |
3181 range->assigned_register())) { | |
3182 continue; | |
3183 } | |
3184 } | |
3036 | 3185 |
3037 UsePosition* next_pos = range->NextRegisterPosition(current->Start()); | 3186 UsePosition* next_pos = range->NextRegisterPosition(current->Start()); |
3038 LifetimePosition spill_pos = FindOptimalSpillingPos(range, split_pos); | 3187 LifetimePosition spill_pos = FindOptimalSpillingPos(range, split_pos); |
3039 if (next_pos == nullptr) { | 3188 if (next_pos == nullptr) { |
3040 SpillAfter(range, spill_pos); | 3189 SpillAfter(range, spill_pos); |
3041 } else { | 3190 } else { |
3042 // When spilling between spill_pos and next_pos ensure that the range | 3191 // When spilling between spill_pos and next_pos ensure that the range |
3043 // remains spilled at least until the start of the current live range. | 3192 // remains spilled at least until the start of the current live range. |
3044 // This guarantees that we will not introduce new unhandled ranges that | 3193 // This guarantees that we will not introduce new unhandled ranges that |
3045 // start before the current range as this violates allocation invariants | 3194 // start before the current range as this violates allocation invariants |
3046 // and will lead to an inconsistent state of active and inactive | 3195 // and will lead to an inconsistent state of active and inactive |
3047 // live-ranges: ranges are allocated in order of their start positions, | 3196 // live-ranges: ranges are allocated in order of their start positions, |
3048 // ranges are retired from active/inactive when the start of the | 3197 // ranges are retired from active/inactive when the start of the |
3049 // current live-range is larger than their end. | 3198 // current live-range is larger than their end. |
3050 DCHECK(LifetimePosition::ExistsGapPositionBetween(current->Start(), | 3199 DCHECK(LifetimePosition::ExistsGapPositionBetween(current->Start(), |
3051 next_pos->pos())); | 3200 next_pos->pos())); |
3052 SpillBetweenUntil(range, spill_pos, current->Start(), next_pos->pos()); | 3201 SpillBetweenUntil(range, spill_pos, current->Start(), next_pos->pos()); |
3053 } | 3202 } |
3054 ActiveToHandled(range); | 3203 ActiveToHandled(range); |
3055 --i; | 3204 --i; |
3056 } | 3205 } |
3057 | 3206 |
3058 for (size_t i = 0; i < inactive_live_ranges().size(); ++i) { | 3207 for (size_t i = 0; i < inactive_live_ranges().size(); ++i) { |
3059 LiveRange* range = inactive_live_ranges()[i]; | 3208 LiveRange* range = inactive_live_ranges()[i]; |
3060 DCHECK(range->End() > current->Start()); | 3209 DCHECK(range->End() > current->Start()); |
3061 if (range->TopLevel()->IsFixed()) continue; | 3210 if (range->TopLevel()->IsFixed()) continue; |
3062 if (range->assigned_register() != reg) continue; | 3211 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) { |
3212 if (range->assigned_register() != reg) continue; | |
3213 } else { | |
3214 if (!data()->config()->AreAliases(current->representation(), reg, | |
3215 range->representation(), | |
3216 range->assigned_register())) | |
3217 continue; | |
3218 } | |
3063 | 3219 |
3064 LifetimePosition next_intersection = range->FirstIntersection(current); | 3220 LifetimePosition next_intersection = range->FirstIntersection(current); |
3065 if (next_intersection.IsValid()) { | 3221 if (next_intersection.IsValid()) { |
3066 UsePosition* next_pos = range->NextRegisterPosition(current->Start()); | 3222 UsePosition* next_pos = range->NextRegisterPosition(current->Start()); |
3067 if (next_pos == nullptr) { | 3223 if (next_pos == nullptr) { |
3068 SpillAfter(range, split_pos); | 3224 SpillAfter(range, split_pos); |
3069 } else { | 3225 } else { |
3070 next_intersection = Min(next_intersection, next_pos->pos()); | 3226 next_intersection = Min(next_intersection, next_pos->pos()); |
3071 SpillBetween(range, split_pos, next_intersection); | 3227 SpillBetween(range, split_pos, next_intersection); |
3072 } | 3228 } |
(...skipping 470 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
3543 DCHECK(!code() | 3699 DCHECK(!code() |
3544 ->InstructionAt(pred->last_instruction_index()) | 3700 ->InstructionAt(pred->last_instruction_index()) |
3545 ->HasReferenceMap()); | 3701 ->HasReferenceMap()); |
3546 gap_index = pred->last_instruction_index(); | 3702 gap_index = pred->last_instruction_index(); |
3547 position = Instruction::END; | 3703 position = Instruction::END; |
3548 } | 3704 } |
3549 data()->AddGapMove(gap_index, position, pred_op, cur_op); | 3705 data()->AddGapMove(gap_index, position, pred_op, cur_op); |
3550 return gap_index; | 3706 return gap_index; |
3551 } | 3707 } |
3552 | 3708 |
3553 | |
3554 void LiveRangeConnector::ConnectRanges(Zone* local_zone) { | 3709 void LiveRangeConnector::ConnectRanges(Zone* local_zone) { |
3555 DelayedInsertionMap delayed_insertion_map(local_zone); | 3710 DelayedInsertionMap delayed_insertion_map(local_zone); |
3556 for (TopLevelLiveRange* top_range : data()->live_ranges()) { | 3711 for (TopLevelLiveRange* top_range : data()->live_ranges()) { |
3557 if (top_range == nullptr) continue; | 3712 if (top_range == nullptr) continue; |
3558 bool connect_spilled = top_range->IsSpilledOnlyInDeferredBlocks(); | 3713 bool connect_spilled = top_range->IsSpilledOnlyInDeferredBlocks(); |
3559 LiveRange* first_range = top_range; | 3714 LiveRange* first_range = top_range; |
3560 for (LiveRange *second_range = first_range->next(); second_range != nullptr; | 3715 for (LiveRange *second_range = first_range->next(); second_range != nullptr; |
3561 first_range = second_range, second_range = second_range->next()) { | 3716 first_range = second_range, second_range = second_range->next()) { |
3562 LifetimePosition pos = second_range->Start(); | 3717 LifetimePosition pos = second_range->Start(); |
3563 // Add gap move if the two live ranges touch and there is no block | 3718 // Add gap move if the two live ranges touch and there is no block |
(...skipping 67 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
3631 } | 3786 } |
3632 if (done) break; | 3787 if (done) break; |
3633 // Reset state. | 3788 // Reset state. |
3634 to_eliminate.clear(); | 3789 to_eliminate.clear(); |
3635 to_insert.clear(); | 3790 to_insert.clear(); |
3636 moves = it->first.first; | 3791 moves = it->first.first; |
3637 } | 3792 } |
3638 // Gather all MoveOperands for a single ParallelMove. | 3793 // Gather all MoveOperands for a single ParallelMove. |
3639 MoveOperands* move = | 3794 MoveOperands* move = |
3640 new (code_zone()) MoveOperands(it->first.second, it->second); | 3795 new (code_zone()) MoveOperands(it->first.second, it->second); |
3641 MoveOperands* eliminate = moves->PrepareInsertAfter(move); | 3796 moves->PrepareInsertAfter(move, &to_eliminate); |
3642 to_insert.push_back(move); | 3797 to_insert.push_back(move); |
3643 if (eliminate != nullptr) to_eliminate.push_back(eliminate); | |
3644 } | 3798 } |
3645 } | 3799 } |
3646 | 3800 |
3647 | 3801 |
3648 void LiveRangeConnector::CommitSpillsInDeferredBlocks( | 3802 void LiveRangeConnector::CommitSpillsInDeferredBlocks( |
3649 TopLevelLiveRange* range, LiveRangeBoundArray* array, Zone* temp_zone) { | 3803 TopLevelLiveRange* range, LiveRangeBoundArray* array, Zone* temp_zone) { |
3650 DCHECK(range->IsSpilledOnlyInDeferredBlocks()); | 3804 DCHECK(range->IsSpilledOnlyInDeferredBlocks()); |
3651 DCHECK(!range->spilled()); | 3805 DCHECK(!range->spilled()); |
3652 | 3806 |
3653 InstructionSequence* code = data()->code(); | 3807 InstructionSequence* code = data()->code(); |
(...skipping 61 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
3715 } | 3869 } |
3716 } | 3870 } |
3717 } | 3871 } |
3718 } | 3872 } |
3719 } | 3873 } |
3720 | 3874 |
3721 | 3875 |
3722 } // namespace compiler | 3876 } // namespace compiler |
3723 } // namespace internal | 3877 } // namespace internal |
3724 } // namespace v8 | 3878 } // namespace v8 |
OLD | NEW |