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Issue 24067002: MIPS/ARM: Fix benchmarks failures on simulator. Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fix ARM port Created 7 years, 3 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
11 // with the distribution. 11 // with the distribution.
12 // * Neither the name of Google Inc. nor the names of its 12 // * Neither the name of Google Inc. nor the names of its
13 // contributors may be used to endorse or promote products derived 13 // contributors may be used to endorse or promote products derived
14 // from this software without specific prior written permission. 14 // from this software without specific prior written permission.
15 // 15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 27
28 #include <stdlib.h> 28 #include <stdlib.h>
29 #include <limits.h> 29 #include <limits.h>
30 #include <fpu_control.h>
30 #include <cmath> 31 #include <cmath>
31 #include <cstdarg> 32 #include <cstdarg>
32 #include "v8.h" 33 #include "v8.h"
33 34
34 #if V8_TARGET_ARCH_MIPS 35 #if V8_TARGET_ARCH_MIPS
35 36
36 #include "cpu.h" 37 #include "cpu.h"
37 #include "disasm.h" 38 #include "disasm.h"
38 #include "assembler.h" 39 #include "assembler.h"
39 #include "globals.h" // Need the BitCast. 40 #include "globals.h" // Need the BitCast.
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875 876
876 void Simulator::Initialize(Isolate* isolate) { 877 void Simulator::Initialize(Isolate* isolate) {
877 if (isolate->simulator_initialized()) return; 878 if (isolate->simulator_initialized()) return;
878 isolate->set_simulator_initialized(true); 879 isolate->set_simulator_initialized(true);
879 ::v8::internal::ExternalReference::set_redirector(isolate, 880 ::v8::internal::ExternalReference::set_redirector(isolate,
880 &RedirectExternalReference); 881 &RedirectExternalReference);
881 } 882 }
882 883
883 884
884 Simulator::Simulator(Isolate* isolate) : isolate_(isolate) { 885 Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
886 set_host_fp_precision();
887
885 i_cache_ = isolate_->simulator_i_cache(); 888 i_cache_ = isolate_->simulator_i_cache();
886 if (i_cache_ == NULL) { 889 if (i_cache_ == NULL) {
887 i_cache_ = new v8::internal::HashMap(&ICacheMatch); 890 i_cache_ = new v8::internal::HashMap(&ICacheMatch);
888 isolate_->set_simulator_i_cache(i_cache_); 891 isolate_->set_simulator_i_cache(i_cache_);
889 } 892 }
890 Initialize(isolate); 893 Initialize(isolate);
891 // Set up simulator support first. Some of this information is needed to 894 // Set up simulator support first. Some of this information is needed to
892 // setup the architecture state. 895 // setup the architecture state.
893 stack_ = reinterpret_cast<char*>(malloc(stack_size_)); 896 stack_ = reinterpret_cast<char*>(malloc(stack_size_));
894 pc_modified_ = false; 897 pc_modified_ = false;
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2910 2913
2911 uintptr_t Simulator::PopAddress() { 2914 uintptr_t Simulator::PopAddress() {
2912 int current_sp = get_register(sp); 2915 int current_sp = get_register(sp);
2913 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); 2916 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp);
2914 uintptr_t address = *stack_slot; 2917 uintptr_t address = *stack_slot;
2915 set_register(sp, current_sp + sizeof(uintptr_t)); 2918 set_register(sp, current_sp + sizeof(uintptr_t));
2916 return address; 2919 return address;
2917 } 2920 }
2918 2921
2919 2922
2923 void Simulator::set_host_fp_precision() {
2924 #if !V8_HOST_ARCH_MIPS
2925 // Set Intel x87 FPU mode to 64-bit double.
2926 // The default FPU mode is extended (80-bit),
2927 // which can lead to unexpected precision failures.
2928 fpu_control_t cw;
2929 _FPU_GETCW(cw);
2930 cw &= ~_FPU_EXTENDED;
2931 cw |= _FPU_DOUBLE;
2932 _FPU_SETCW(cw);
2933 #endif
2934 }
2935
2936
2920 #undef UNSUPPORTED 2937 #undef UNSUPPORTED
2921 2938
2922 } } // namespace v8::internal 2939 } } // namespace v8::internal
2923 2940
2924 #endif // USE_SIMULATOR 2941 #endif // USE_SIMULATOR
2925 2942
2926 #endif // V8_TARGET_ARCH_MIPS 2943 #endif // V8_TARGET_ARCH_MIPS
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