Switchable call scheduling.

runtime/vm/instructions_mips.cc

Index: runtime/vm/instructions_mips.cc
diff --git a/runtime/vm/instructions_mips.cc b/runtime/vm/instructions_mips.cc
index 737094e69cc6b014e3a45b1692f5de957e52ae36..cc51a3df20c5f5ca25728861f627a1e217fcc6f6 100644
--- a/runtime/vm/instructions_mips.cc
+++ b/runtime/vm/instructions_mips.cc
@@ -227,15 +227,15 @@ SwitchableCallPattern::SwitchableCallPattern(uword pc, const Code& code)
   ASSERT(*(reinterpret_cast<uword*>(pc) - 2) == 0x0320f809);
 
   Register reg;
-  uword stub_load_end =
-      InstructionPattern::DecodeLoadWordFromPool(pc - 3 * Instr::kInstrSize,
+  uword data_load_end =
+      InstructionPattern::DecodeLoadWordFromPool(pc - 2 * Instr::kInstrSize,
                                                  &reg,
-                                                 &target_pool_index_);
-  ASSERT(reg == CODE_REG);
-  InstructionPattern::DecodeLoadWordFromPool(stub_load_end,
-                                             &reg,
-                                             &data_pool_index_);
+                                                 &data_pool_index_);
   ASSERT(reg == S5);
+  InstructionPattern::DecodeLoadWordFromPool(data_load_end - Instr::kInstrSize,
+                                             &reg,
+                                             &target_pool_index_);
+  ASSERT(reg == CODE_REG);
 }