Add MSA optimized I422ToYUY2Row, I422ToUYVYRow functions

Add MSA optimized I422ToYUY2Row, I422ToUYVYRow functions

R=fbarchard@google.com
BUG=libyuv:634
Performance gains :-

I422ToYUY2Row_MSA     - ~12x
I422ToYUY2Row_Any_MSA - ~7x

I422ToUYVYRow_MSA     - ~12x
I422ToUYVYRow_Any_MSA - ~7x

Committed: https://chromium.googlesource.com/libyuv/libyuv/+/7018f5be0f98419c0e4eac518b0641655ba91c98

[manojkumar.bhosale, 2016-09-29 13:30:08]

Description was changed from

==========
Add MSA optimized I422ToYUY2Row, I422ToUYVYRow functions

R=fbarchard@google.com
BUG=libyuv:634
==========

to

==========
Add MSA optimized I422ToYUY2Row, I422ToUYVYRow functions

R=fbarchard@google.com
BUG=libyuv:634

Performance gains :-

I422ToYUY2Row_MSA     - ~12x
I422ToYUY2Row_Any_MSA - ~7x

I422ToUYVYRow_MSA     - ~12x
I422ToUYVYRow_Any_MSA - ~7x
==========

[manojkumar.bhosale, 2016-09-29 13:30:08]

manojkumar.bhosale@imgtec.com changed reviewers:
+ kjellander@chromium.org

[manojkumar.bhosale, 2016-09-29 13:30:34]

Description was changed from

==========
Add MSA optimized I422ToYUY2Row, I422ToUYVYRow functions

R=fbarchard@google.com
BUG=libyuv:634

Performance gains :-

I422ToYUY2Row_MSA     - ~12x
I422ToYUY2Row_Any_MSA - ~7x

I422ToUYVYRow_MSA     - ~12x
I422ToUYVYRow_Any_MSA - ~7x
==========

to

==========
Add MSA optimized I422ToYUY2Row, I422ToUYVYRow functions

R=fbarchard@google.com
BUG=libyuv:634



Performance gains :-

I422ToYUY2Row_MSA     - ~12x
I422ToYUY2Row_Any_MSA - ~7x

I422ToUYVYRow_MSA     - ~12x
I422ToUYVYRow_Any_MSA - ~7x
==========

[manojkumar.bhosale, 2016-09-29 13:32:29]

Updated with reviewers, cc list and performance gain numbers

[fbarchard1, 2016-09-29 17:10:43]

lgtm - if you want to submit we'll want to followup on cpuid

YUY2 part looks ok... would prefer not use macros

The cpuid I'm less sure about. cpuid is a tricky thing to get right and I have
ongoing issues on every platform with it.
Could you open a bug for cpuid and make YUY2 CL and cpuid into different CLs?

https://codereview.chromium.org/2378753004/diff/1/source/cpu_id.cc
File source/cpu_id.cc (right):

https://codereview.chromium.org/2378753004/diff/1/source/cpu_id.cc#newcode169
source/cpu_id.cc:169: #define HWCAP_MIPS_R6     (1 << 0)
R6 not used?

https://codereview.chromium.org/2378753004/diff/1/source/cpu_id.cc#newcode180
source/cpu_id.cc:180: hwcap = getauxval(AT_HWCAP);
this function is also unavailable in sandbox?
prefer the cpuid functionality be done in a different CL from YUY2

https://codereview.chromium.org/2378753004/diff/1/source/cpu_id.cc#newcode195
source/cpu_id.cc:195: hwcap = getauxval(AT_HWCAP);
this is mixed into string parsing code?  
getauxval(AT_HWCAP); will work even if ASEs implemented is not in /proc/cpu_info

https://codereview.chromium.org/2378753004/diff/1/source/row_msa.cc
File source/row_msa.cc (right):

https://codereview.chromium.org/2378753004/diff/1/source/row_msa.cc#newcode69
source/row_msa.cc:69: ILVRL_B2_UB(src_v0, src_u0, vec_uv0, vec_uv1);
Did you try just 1 vector at a time instead of 2?  Is it improving performance
much to unroll all instructions to 2?

[manojkumar.bhosale, 2016-09-30 09:00:29]

Removed cpuid from this CL

Any specific reason for avoiding use of macros?
We have bigger functions in queue to upstream where we are reducing LOC using
macros, keeping uniformity with already upstream sources, easy for us to
maintain/fix issues with any built-in/compilers etc.

https://codereview.chromium.org/2378753004/diff/1/source/cpu_id.cc
File source/cpu_id.cc (right):

https://codereview.chromium.org/2378753004/diff/1/source/cpu_id.cc#newcode169
source/cpu_id.cc:169: #define HWCAP_MIPS_R6     (1 << 0)
On 2016/09/29 17:10:43, fbarchard1 wrote:
> R6 not used?

No, not now as R5, R6 both returns MSA HWCAPS so R6 specific condition check is
not added now.

https://codereview.chromium.org/2378753004/diff/1/source/cpu_id.cc#newcode180
source/cpu_id.cc:180: hwcap = getauxval(AT_HWCAP);
On 2016/09/29 17:10:43, fbarchard1 wrote:
> this function is also unavailable in sandbox?
> prefer the cpuid functionality be done in a different CL from YUY2

OK. will split that in new CL

https://codereview.chromium.org/2378753004/diff/1/source/cpu_id.cc#newcode195
source/cpu_id.cc:195: hwcap = getauxval(AT_HWCAP);
On 2016/09/29 17:10:43, fbarchard1 wrote:
> this is mixed into string parsing code?  
> getauxval(AT_HWCAP); will work even if ASEs implemented is not in
/proc/cpu_info

Removed cpuid code from this CL

https://codereview.chromium.org/2378753004/diff/1/source/row_msa.cc
File source/row_msa.cc (right):

https://codereview.chromium.org/2378753004/diff/1/source/row_msa.cc#newcode69
source/row_msa.cc:69: ILVRL_B2_UB(src_v0, src_u0, vec_uv0, vec_uv1);
On 2016/09/29 17:10:43, fbarchard1 wrote:
> Did you try just 1 vector at a time instead of 2?  Is it improving performance
> much to unroll all instructions to 2?

all the loop unrolling we have done is based on load latencies and to reduce
un-necessary stalls. Here, byte vector holds 16 elements of u and v after load,
so we needed 2 loads of y and hence all subsequent operations with 2
instructions.
Operating 1 y vector at a time is possible but then we will be wasting half of
the u and v elements getting loaded anyway, will insert more stalls which will
be un-optimal.

[fbarchard1, 2016-10-04 01:21:26]

lgtm

[fbarchard1, 2016-10-04 01:21:34]

Description was changed from

==========
Add MSA optimized I422ToYUY2Row, I422ToUYVYRow functions

R=fbarchard@google.com
BUG=libyuv:634



Performance gains :-

I422ToYUY2Row_MSA     - ~12x
I422ToYUY2Row_Any_MSA - ~7x

I422ToUYVYRow_MSA     - ~12x
I422ToUYVYRow_Any_MSA - ~7x
==========

to

==========
Add MSA optimized I422ToYUY2Row, I422ToUYVYRow functions

R=fbarchard@google.com
BUG=libyuv:634



Performance gains :-

I422ToYUY2Row_MSA     - ~12x
I422ToYUY2Row_Any_MSA - ~7x

I422ToUYVYRow_MSA     - ~12x
I422ToUYVYRow_Any_MSA - ~7x

Committed:
https://chromium.googlesource.com/libyuv/libyuv/+/7018f5be0f98419c0e4eac518b0...
==========

[fbarchard1, 2016-10-04 01:21:35]

Committed patchset #2 (id:20001) manually as
7018f5be0f98419c0e4eac518b0641655ba91c98 (presubmit successful).