Subzero, MIPS32: MOVZ instruction encoding

src/IceAssemblerMIPS32.cpp

Index: src/IceAssemblerMIPS32.cpp
diff --git a/src/IceAssemblerMIPS32.cpp b/src/IceAssemblerMIPS32.cpp
index a3de7300e4ad6310a8a61d3cefb8490bd4226d5d..86fe01a8bcdb4c420af42786738579d6a20d99d2 100644
--- a/src/IceAssemblerMIPS32.cpp
+++ b/src/IceAssemblerMIPS32.cpp
@@ -704,6 +704,12 @@ void AssemblerMIPS32::movz_d(const Operand *OpFd, const Operand *OpFs,
   emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "movz.d");
 }
 
+void AssemblerMIPS32::movz(const Operand *OpRd, const Operand *OpRs,
+                           const Operand *OpRt) {
+  static constexpr IValueT Opcode = 0x0000000A;
+  emitRdRsRt(Opcode, OpRd, OpRs, OpRt, "movz");
+}
+
 void AssemblerMIPS32::movz_s(const Operand *OpFd, const Operand *OpFs,
                              const Operand *OpFt) {
   static constexpr IValueT Opcode = 0x44000012;