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| 1 //===- subzero/src/IceAssemblerMIPS32.cpp - MIPS32 Assembler --------------===// | 1 //===- subzero/src/IceAssemblerMIPS32.cpp - MIPS32 Assembler --------------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 697 Opcode |= Rs << 21; | 697 Opcode |= Rs << 21; |
| 698 emitInst(Opcode); | 698 emitInst(Opcode); |
| 699 } | 699 } |
| 700 | 700 |
| 701 void AssemblerMIPS32::movz_d(const Operand *OpFd, const Operand *OpFs, | 701 void AssemblerMIPS32::movz_d(const Operand *OpFd, const Operand *OpFs, |
| 702 const Operand *OpFt) { | 702 const Operand *OpFt) { |
| 703 static constexpr IValueT Opcode = 0x44000012; | 703 static constexpr IValueT Opcode = 0x44000012; |
| 704 emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "movz.d"); | 704 emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "movz.d"); |
| 705 } | 705 } |
| 706 | 706 |
| 707 void AssemblerMIPS32::movz(const Operand *OpRd, const Operand *OpRs, |
| 708 const Operand *OpRt) { |
| 709 static constexpr IValueT Opcode = 0x0000000A; |
| 710 emitRdRsRt(Opcode, OpRd, OpRs, OpRt, "movz"); |
| 711 } |
| 712 |
| 707 void AssemblerMIPS32::movz_s(const Operand *OpFd, const Operand *OpFs, | 713 void AssemblerMIPS32::movz_s(const Operand *OpFd, const Operand *OpFs, |
| 708 const Operand *OpFt) { | 714 const Operand *OpFt) { |
| 709 static constexpr IValueT Opcode = 0x44000012; | 715 static constexpr IValueT Opcode = 0x44000012; |
| 710 emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "movz.s"); | 716 emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "movz.s"); |
| 711 } | 717 } |
| 712 | 718 |
| 713 void AssemblerMIPS32::mtc1(const Operand *OpRt, const Operand *OpFs) { | 719 void AssemblerMIPS32::mtc1(const Operand *OpRt, const Operand *OpFs) { |
| 714 static constexpr IValueT Opcode = 0x44800000; | 720 static constexpr IValueT Opcode = 0x44800000; |
| 715 emitCOP1MovRtFs(Opcode, OpRt, OpFs, "mtc1"); | 721 emitCOP1MovRtFs(Opcode, OpRt, OpFs, "mtc1"); |
| 716 } | 722 } |
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| 1003 emitBr(Cond, OpRs, OpRtNone, Dest); | 1009 emitBr(Cond, OpRs, OpRtNone, Dest); |
| 1004 return; | 1010 return; |
| 1005 } | 1011 } |
| 1006 const IOffsetT Position = Buffer.size(); | 1012 const IOffsetT Position = Buffer.size(); |
| 1007 emitBr(Cond, OpRs, OpRtNone, TargetLabel->getEncodedPosition()); | 1013 emitBr(Cond, OpRs, OpRtNone, TargetLabel->getEncodedPosition()); |
| 1008 TargetLabel->linkTo(*this, Position); | 1014 TargetLabel->linkTo(*this, Position); |
| 1009 } | 1015 } |
| 1010 | 1016 |
| 1011 } // end of namespace MIPS32 | 1017 } // end of namespace MIPS32 |
| 1012 } // end of namespace Ice | 1018 } // end of namespace Ice |
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