Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(25)

Issues Search
    My Issues | Starred     Open | Closed | All

Unified Diff: src/IceAssemblerMIPS32.h

Issue 2377733002: Subzero, MIPS32: DIVU instruction encoding (Closed)
Patch Set: Created 4 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « no previous file | src/IceAssemblerMIPS32.cpp » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: src/IceAssemblerMIPS32.h
diff --git a/src/IceAssemblerMIPS32.h b/src/IceAssemblerMIPS32.h
index ebb17c8dc6d1a191f10d20bd9d2973050310739f..ce9511b1a3594647daeae2e8ae4b17760e7352fa 100644
--- a/src/IceAssemblerMIPS32.h
+++ b/src/IceAssemblerMIPS32.h
@@ -163,6 +163,8 @@ public:
void div_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
+ void divu(const Operand *OpRs, const Operand *OpRt);
+
void lui(const Operand *OpRt, const uint16_t Imm);
void lw(const Operand *OpRt, const Operand *OpBase, const uint32_t Offset);
« no previous file with comments | « no previous file | src/IceAssemblerMIPS32.cpp » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698