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Unified Diff: src/arm/assembler-arm.h

Issue 23766038: Thumb2 Backend: 32-bit instruction encoding methods Base URL: HEAD^
Patch Set: Created 7 years, 3 months ago
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Index: src/arm/assembler-arm.h
diff --git a/src/arm/assembler-arm.h b/src/arm/assembler-arm.h
index 6fb692f22ef4616786f8740d93eaae44e484480d..3223f827e101a1f54312725bafe98ab6463ace47 100644
--- a/src/arm/assembler-arm.h
+++ b/src/arm/assembler-arm.h
@@ -842,9 +842,17 @@ class Assembler : public AssemblerBase {
void and_(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
+ void and_imm_t1(Register dst, Register src1, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void and_reg_t2(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void eor(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
+ void eor_imm_t1(Register dst, Register src1, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void eor_reg_t2(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void sub(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -852,9 +860,19 @@ class Assembler : public AssemblerBase {
SBit s = LeaveCC, Condition cond = al) {
sub(dst, src1, Operand(src2), s, cond);
}
+ void sub_imm_t3(Register dst, Register src1, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void sub_imm_t4(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
+ void sub_reg_t3(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void rsb(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
+ void rsb_imm_t2(Register dst, Register src1, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void rsb_reg_t1(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void add(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -862,12 +880,26 @@ class Assembler : public AssemblerBase {
SBit s = LeaveCC, Condition cond = al) {
add(dst, src1, Operand(src2), s, cond);
}
+ void add_imm_t3(Register dst, Register src1, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void add_imm_t4(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
+ void add_reg_t3(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void adc(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
+ void adc_imm_t1(Register dst, Register src1, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void adc_reg_t2(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void sbc(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
+ void sbc_imm_t1(Register dst, Register src1, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void sbc_reg_t2(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void rsc(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -876,16 +908,28 @@ class Assembler : public AssemblerBase {
void tst(Register src1, Register src2, Condition cond = al) {
tst(src1, Operand(src2), cond);
}
+ void tst_imm_t1(Register src1, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void tst_reg_t2(Register src1, const Operand& src2, Condition cond);
void teq(Register src1, const Operand& src2, Condition cond = al);
+ void teq_imm_t1(Register src1, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void teq_reg_t1(Register src1, const Operand& src2, Condition cond);
void cmp(Register src1, const Operand& src2, Condition cond = al);
void cmp(Register src1, Register src2, Condition cond = al) {
cmp(src1, Operand(src2), cond);
}
+ void cmp_imm_t2(Register src1, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void cmp_reg_t3(Register src1, const Operand& src2, Condition cond);
void cmp_raw_immediate(Register src1, int raw_immediate, Condition cond = al);
void cmn(Register src1, const Operand& src2, Condition cond = al);
+ void cmn_imm_t1(Register src1, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void cmn_reg_t2(Register src1, const Operand& src2, Condition cond);
void orr(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -893,12 +937,31 @@ class Assembler : public AssemblerBase {
SBit s = LeaveCC, Condition cond = al) {
orr(dst, src1, Operand(src2), s, cond);
}
+ void orr_imm_t1(Register dst, Register src1, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void orr_reg_t2(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void mov(Register dst, const Operand& src,
SBit s = LeaveCC, Condition cond = al);
void mov(Register dst, Register src, SBit s = LeaveCC, Condition cond = al) {
mov(dst, Operand(src), s, cond);
}
+ void mov_imm_t2(Register dst, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void mov_imm_t3(Register dst, const Operand& src,
+ SBit s, Condition cond);
+ void mov_reg_t3(Register dst, const Operand& src,
+ SBit s, Condition cond);
+
+ void lsl_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void lsl_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void lsr_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void lsr_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void asr_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void asr_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void ror_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void ror_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
// Load the position of the label relative to the generated code object
// pointer in a register.
@@ -913,9 +976,17 @@ class Assembler : public AssemblerBase {
void bic(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
+ void bic_imm_t1(Register dst, Register src1, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void bic_reg_t2(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void mvn(Register dst, const Operand& src,
SBit s = LeaveCC, Condition cond = al);
+ void mvn_imm_t1(Register dst, SBit s, Condition cond,
+ uint32_t i, uint32_t imm3, uint32_t imm8);
+ void mvn_reg_t2(Register dst, const Operand& src,
+ SBit s, Condition cond);
// Multiply instructions
@@ -930,6 +1001,8 @@ class Assembler : public AssemblerBase {
void mul(Register dst, Register src1, Register src2,
SBit s = LeaveCC, Condition cond = al);
+ void mul_t2(Register dst, Register src1, Register src2,
+ SBit s, Condition cond);
void smlal(Register dstL, Register dstH, Register src1, Register src2,
SBit s = LeaveCC, Condition cond = al);
@@ -1009,9 +1082,15 @@ class Assembler : public AssemblerBase {
void ldrd(Register dst1,
Register dst2,
const MemOperand& src, Condition cond = al);
+ void ldrd_imm_t1(Register dst1,
+ Register dst2,
+ const MemOperand& src);
void strd(Register src1,
Register src2,
const MemOperand& dst, Condition cond = al);
+ void strd_imm_t1(Register src1,
+ Register src2,
+ const MemOperand& dst);
// Preload instructions
void pld(const MemOperand& address);
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