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Unified Diff: src/arm/assembler-arm.h

Issue 23600058: Thumb2 Backend: Arithmetic instruction encoding methods Base URL: HEAD^
Patch Set: Created 7 years, 3 months ago
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Index: src/arm/assembler-arm.h
diff --git a/src/arm/assembler-arm.h b/src/arm/assembler-arm.h
index 3223f827e101a1f54312725bafe98ab6463ace47..8f224c8af162eb4e075a3f299dd900d7f708b6eb 100644
--- a/src/arm/assembler-arm.h
+++ b/src/arm/assembler-arm.h
@@ -846,6 +846,8 @@ class Assembler : public AssemblerBase {
uint32_t i, uint32_t imm3, uint32_t imm8);
void and_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
+ void and_thumb(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void eor(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -853,6 +855,8 @@ class Assembler : public AssemblerBase {
uint32_t i, uint32_t imm3, uint32_t imm8);
void eor_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
+ void eor_thumb(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void sub(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -866,6 +870,8 @@ class Assembler : public AssemblerBase {
SBit s, Condition cond);
void sub_reg_t3(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
+ void sub_thumb(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void rsb(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -873,6 +879,8 @@ class Assembler : public AssemblerBase {
uint32_t i, uint32_t imm3, uint32_t imm8);
void rsb_reg_t1(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
+ void rsb_thumb(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void add(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -886,6 +894,8 @@ class Assembler : public AssemblerBase {
SBit s, Condition cond);
void add_reg_t3(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
+ void add_thumb(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void adc(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -893,6 +903,8 @@ class Assembler : public AssemblerBase {
uint32_t i, uint32_t imm3, uint32_t imm8);
void adc_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
+ void adc_thumb(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void sbc(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -900,6 +912,8 @@ class Assembler : public AssemblerBase {
uint32_t i, uint32_t imm3, uint32_t imm8);
void sbc_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
+ void sbc_thumb(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void rsc(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -911,11 +925,13 @@ class Assembler : public AssemblerBase {
void tst_imm_t1(Register src1, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void tst_reg_t2(Register src1, const Operand& src2, Condition cond);
+ void tst_thumb(Register src1, const Operand& src2, Condition cond);
void teq(Register src1, const Operand& src2, Condition cond = al);
void teq_imm_t1(Register src1, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void teq_reg_t1(Register src1, const Operand& src2, Condition cond);
+ void teq_thumb(Register src1, const Operand& src2, Condition cond);
void cmp(Register src1, const Operand& src2, Condition cond = al);
void cmp(Register src1, Register src2, Condition cond = al) {
@@ -924,12 +940,14 @@ class Assembler : public AssemblerBase {
void cmp_imm_t2(Register src1, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void cmp_reg_t3(Register src1, const Operand& src2, Condition cond);
+ void cmp_thumb(Register src1, const Operand& src2, Condition cond);
void cmp_raw_immediate(Register src1, int raw_immediate, Condition cond = al);
void cmn(Register src1, const Operand& src2, Condition cond = al);
void cmn_imm_t1(Register src1, Condition cond,
uint32_t i, uint32_t imm3, uint32_t imm8);
void cmn_reg_t2(Register src1, const Operand& src2, Condition cond);
+ void cmn_thumb(Register src1, const Operand& src2, Condition cond);
void orr(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -941,6 +959,8 @@ class Assembler : public AssemblerBase {
uint32_t i, uint32_t imm3, uint32_t imm8);
void orr_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
+ void orr_thumb(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void mov(Register dst, const Operand& src,
SBit s = LeaveCC, Condition cond = al);
@@ -953,15 +973,21 @@ class Assembler : public AssemblerBase {
SBit s, Condition cond);
void mov_reg_t3(Register dst, const Operand& src,
SBit s, Condition cond);
+ void mov_thumb(Register dst, const Operand& src,
+ SBit s, Condition cond);
void lsl_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
void lsl_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void lsl_thumb(Register dst, const Operand& src, SBit s, Condition cond);
void lsr_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
void lsr_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void lsr_thumb(Register dst, const Operand& src, SBit s, Condition cond);
void asr_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
void asr_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void asr_thumb(Register dst, const Operand& src, SBit s, Condition cond);
void ror_imm_t2(Register dst, const Operand& src, SBit s, Condition cond);
void ror_reg_t2(Register dst, const Operand& src, SBit s, Condition cond);
+ void ror_thumb(Register dst, const Operand& src, SBit s, Condition cond);
// Load the position of the label relative to the generated code object
// pointer in a register.
@@ -973,6 +999,7 @@ class Assembler : public AssemblerBase {
void movw(Register reg, uint32_t immediate, Condition cond = al);
// The constant for movt should be in the range 0-0xffff.
void movt(Register reg, uint32_t immediate, Condition cond = al);
+ void movt_thumb(Register reg, uint32_t immediate, Condition cond = al);
void bic(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);
@@ -980,6 +1007,8 @@ class Assembler : public AssemblerBase {
uint32_t i, uint32_t imm3, uint32_t imm8);
void bic_reg_t2(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond);
+ void bic_thumb(Register dst, Register src1, const Operand& src2,
+ SBit s, Condition cond);
void mvn(Register dst, const Operand& src,
SBit s = LeaveCC, Condition cond = al);
@@ -987,6 +1016,8 @@ class Assembler : public AssemblerBase {
uint32_t i, uint32_t imm3, uint32_t imm8);
void mvn_reg_t2(Register dst, const Operand& src,
SBit s, Condition cond);
+ void mvn_thumb(Register dst, const Operand& src,
+ SBit s, Condition cond);
// Multiply instructions
@@ -1003,6 +1034,8 @@ class Assembler : public AssemblerBase {
SBit s = LeaveCC, Condition cond = al);
void mul_t2(Register dst, Register src1, Register src2,
SBit s, Condition cond);
+ void mul_thumb(Register dst, Register src1, Register src2,
+ SBit s, Condition cond);
void smlal(Register dstL, Register dstH, Register src1, Register src2,
SBit s = LeaveCC, Condition cond = al);
@@ -1353,6 +1386,10 @@ class Assembler : public AssemblerBase {
// Jump unconditionally to given label.
void jmp(Label* L) { b(L, al); }
+ void it_thumb(Condition cond, int num_instr, bool cond2 = false,
+ bool cond3 = false, bool cond4 = false);
+ inline void emit_it(Condition cond);
+
static bool use_immediate_embedded_pointer_loads(
const Assembler* assembler) {
return CpuFeatures::IsSupported(MOVW_MOVT_IMMEDIATE_LOADS) &&
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