Subzero, MIPS32: Instruction NOR, pseudoinstruction NOT

src/IceAssemblerMIPS32.cpp

Index: src/IceAssemblerMIPS32.cpp
diff --git a/src/IceAssemblerMIPS32.cpp b/src/IceAssemblerMIPS32.cpp
index 6e8731c70873211e7c133d25b5aeb9e6ce27d2b8..633e4e7f04c5569aa1964de5f59e7d5509e2b49c 100644
--- a/src/IceAssemblerMIPS32.cpp
+++ b/src/IceAssemblerMIPS32.cpp
@@ -670,6 +670,12 @@ void AssemblerMIPS32::mul_s(const Operand *OpFd, const Operand *OpFs,
   emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "mul.s");
 }
 
+void AssemblerMIPS32::nor(const Operand *OpRd, const Operand *OpRs,
+                          const Operand *OpRt) {
+  static constexpr IValueT Opcode = 0x00000027;
+  emitRdRsRt(Opcode, OpRd, OpRs, OpRt, "nor");
+}
+
 void AssemblerMIPS32::or_(const Operand *OpRd, const Operand *OpRs,
                           const Operand *OpRt) {
   static constexpr IValueT Opcode = 0x00000025;