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Unified Diff: src/compiler/mips64/instruction-codes-mips64.h

Issue 2355743003: MIPS: [turbofan] Optimize sign-extension patterns like Sar(Shl(x, a), b)). (Closed)
Patch Set: Created 4 years, 3 months ago
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Index: src/compiler/mips64/instruction-codes-mips64.h
diff --git a/src/compiler/mips64/instruction-codes-mips64.h b/src/compiler/mips64/instruction-codes-mips64.h
index e3dedd17509bb2460f92d4353427dd9014fe9698..efcdcc59fd79bf15ae440442fa204bdc7a3cbc03 100644
--- a/src/compiler/mips64/instruction-codes-mips64.h
+++ b/src/compiler/mips64/instruction-codes-mips64.h
@@ -159,7 +159,9 @@ namespace compiler {
V(Mips64StoreToStackSlot) \
V(Mips64ByteSwap64) \
V(Mips64ByteSwap32) \
- V(Mips64StackClaim)
+ V(Mips64StackClaim) \
+ V(Mips64Seb) \
+ V(Mips64Seh)
// Addressing modes represent the "shape" of inputs to an instruction.
// Many instructions support multiple addressing modes. Addressing modes
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