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Unified Diff: tests_lit/llvm2ice_tests/arith.ll

Issue 2339323004: [SubZero] Use DIV instruction instead of TargetHelperCall (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 3 months ago
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Index: tests_lit/llvm2ice_tests/arith.ll
diff --git a/tests_lit/llvm2ice_tests/arith.ll b/tests_lit/llvm2ice_tests/arith.ll
index 9d6a110149ecd056f7926c4dcfba2cfdb0be0edd..a28ffff30d8c849f73545b88a994f4bd24d7612c 100644
--- a/tests_lit/llvm2ice_tests/arith.ll
+++ b/tests_lit/llvm2ice_tests/arith.ll
@@ -171,7 +171,9 @@ entry:
; ARM32HWDIV: sdiv
; MIPS32-LABEL: Sdiv
-; MIPS32: jal {{.*}} __divsi3
+; MIPS32: div zero,{{.*}},[[REG:.*]]
+; MIPS32: teq [[REG]],zero,0x7
+; MIPS32: mflo
define internal i32 @SdivConst(i32 %a) {
entry:
@@ -190,7 +192,9 @@ entry:
; ARM32HWDIV: sdiv
; MIPS32-LABEL: SdivConst
-; MIPS32: jal {{.*}} __divsi3
+; MIPS32: div zero,{{.*}},[[REG:.*]]
+; MIPS32: teq [[REG]],zero,0x7
+; MIPS32: mflo
define internal i32 @Srem(i32 %a, i32 %b) {
entry:
@@ -212,7 +216,9 @@ entry:
; ARM32HWDIV: mls
; MIPS32-LABEL: Srem
-; MIPS32: jal {{.*}} __modsi3
+; MIPS32: div zero,{{.*}},[[REG:.*]]
+; MIPS32: teq [[REG]],zero,0x7
+; MIPS32: mfhi
define internal i32 @Udiv(i32 %a, i32 %b) {
entry:
@@ -232,7 +238,9 @@ entry:
; ARM32HWDIV: udiv
; MIPS32-LABEL: Udiv
-; MIPS32: jal {{.*}} __udivsi3
+; MIPS32: divu zero,{{.*}},[[REG:.*]]
+; MIPS32: teq [[REG]],zero,0x7
+; MIPS32: mflo
define internal i32 @Urem(i32 %a, i32 %b) {
entry:
@@ -253,7 +261,9 @@ entry:
; ARM32HWDIV: mls
; MIPS32-LABEL: Urem
-; MIPS32: jal {{.*}} __umodsi3
+; MIPS32: divu zero,{{.*}},[[REG:.*]]
+; MIPS32: teq [[REG]],zero,0x7
+; MIPS32: mfhi
; The following tests check that shift instructions don't try to use a
; ConstantRelocatable as an immediate operand.
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