[SubZero] Use DIV instruction instead of TargetHelperCall

tests_lit/llvm2ice_tests/arith.ll

 ; Assembly test for simple arithmetic operations.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -O2 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 
 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
 ; once enough infrastructure is in. Also, switch to --filetype=obj
 ; when possible.
 ; RUN: %if --need=target_ARM32 --need=allow_dump \
@@ skipping 153 matching lines @@
 ; ARM32: bne
 ; The following instruction is ".word 0xe7fedef0 = udf #60896 ; 0xede0".
 ; ARM32: e7fedef0
 ; ARM32: bl {{.*}} __divsi3
 ; ARM32HWDIV-LABEL: Sdiv
 ; ARM32HWDIV: tst
 ; ARM32HWDIV: bne
 ; ARM32HWDIV: sdiv
 
 ; MIPS32-LABEL: Sdiv
-; MIPS32: jal {{.*}} __divsi3
+; MIPS32: div zero,{{.*}},[[REG:.*]]
+; MIPS32: teq [[REG]],zero,0x7
+; MIPS32: mflo
 
 define internal i32 @SdivConst(i32 %a) {
 entry:
   %div = sdiv i32 %a, 219
   ret i32 %div
 }
 ; CHECK-LABEL: SdivConst
 ; CHECK: cdq
 ; CHECK: idiv e
 ;
 ; ARM32-LABEL: SdivConst
 ; ARM32-NOT: tst
 ; ARM32: bl {{.*}} __divsi3
 ; ARM32HWDIV-LABEL: SdivConst
 ; ARM32HWDIV-NOT: tst
 ; ARM32HWDIV: sdiv
 
 ; MIPS32-LABEL: SdivConst
-; MIPS32: jal {{.*}} __divsi3
+; MIPS32: div zero,{{.*}},[[REG:.*]]
+; MIPS32: teq [[REG]],zero,0x7
+; MIPS32: mflo
 
 define internal i32 @Srem(i32 %a, i32 %b) {
 entry:
   %rem = srem i32 %a, %b
   ret i32 %rem
 }
 ; CHECK-LABEL: Srem
 ; CHECK: cdq
 ; CHECK: idiv e
 ;
 ; ARM32-LABEL: Srem
 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
 ; ARM32: bne
 ; ARM32: bl {{.*}} __modsi3
 ; ARM32HWDIV-LABEL: Srem
 ; ARM32HWDIV: tst
 ; ARM32HWDIV: bne
 ; ARM32HWDIV: sdiv
 ; ARM32HWDIV: mls
 
 ; MIPS32-LABEL: Srem
-; MIPS32: jal {{.*}} __modsi3
+; MIPS32: div zero,{{.*}},[[REG:.*]]
+; MIPS32: teq [[REG]],zero,0x7
+; MIPS32: mfhi
 
 define internal i32 @Udiv(i32 %a, i32 %b) {
 entry:
   %div = udiv i32 %a, %b
   ret i32 %div
 }
 ; CHECK-LABEL: Udiv
 ; CHECK: div e
 ;
 ; ARM32-LABEL: Udiv
 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
 ; ARM32: bne
 ; ARM32: bl {{.*}} __udivsi3
 ; ARM32HWDIV-LABEL: Udiv
 ; ARM32HWDIV: tst
 ; ARM32HWDIV: bne
 ; ARM32HWDIV: udiv
 
 ; MIPS32-LABEL: Udiv
-; MIPS32: jal {{.*}} __udivsi3
+; MIPS32: divu zero,{{.*}},[[REG:.*]]
+; MIPS32: teq [[REG]],zero,0x7
+; MIPS32: mflo
 
 define internal i32 @Urem(i32 %a, i32 %b) {
 entry:
   %rem = urem i32 %a, %b
   ret i32 %rem
 }
 ; CHECK-LABEL: Urem
 ; CHECK: div e
 ;
 ; ARM32-LABEL: Urem
 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
 ; ARM32: bne
 ; ARM32: bl {{.*}} __umodsi3
 ; ARM32HWDIV-LABEL: Urem
 ; ARM32HWDIV: tst
 ; ARM32HWDIV: bne
 ; ARM32HWDIV: udiv
 ; ARM32HWDIV: mls
 
 ; MIPS32-LABEL: Urem
-; MIPS32: jal {{.*}} __umodsi3
+; MIPS32: divu zero,{{.*}},[[REG:.*]]
+; MIPS32: teq [[REG]],zero,0x7
+; MIPS32: mfhi
 
 ; The following tests check that shift instructions don't try to use a
 ; ConstantRelocatable as an immediate operand.
 
 @G = internal global [4 x i8] zeroinitializer, align 4
 
 define internal i32 @ShlReloc(i32 %a) {
 entry:
   %opnd = ptrtoint [4 x i8]* @G to i32
   %result = shl i32 %a, %opnd
@@ skipping 12 matching lines @@
 ; CHECK: shr {{.*}},cl
 
 define internal i32 @AshrReloc(i32 %a) {
 entry:
   %opnd = ptrtoint [4 x i8]* @G to i32
   %result = ashr i32 %a, %opnd
   ret i32 %result
 }
 ; CHECK-LABEL: AshrReloc
 ; CHECK: sar {{.*}},cl