Subzero, MIPS32: lowerSelect for i1, i8, i16, i32, f32, f64

tests_lit/llvm2ice_tests/select-opt.ll

Index: tests_lit/llvm2ice_tests/select-opt.ll
diff --git a/tests_lit/llvm2ice_tests/select-opt.ll b/tests_lit/llvm2ice_tests/select-opt.ll
index aa2c4d9aa5d9f861ccac2a9fa9bb71e5b78d1659..10f9a9b9f643d1454533e063954fa114a644f307 100644
--- a/tests_lit/llvm2ice_tests/select-opt.ll
+++ b/tests_lit/llvm2ice_tests/select-opt.ll
@@ -23,6 +23,20 @@
 ; RUN:   | %if --need=target_ARM32 --need=allow_dump \
 ; RUN:   --command FileCheck --check-prefix ARM32 --check-prefix ARM32-OM1 %s
 
+; RUN: %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command %p2i --filetype=asm --assemble \
+; RUN:   --disassemble --target mips32 -i %s --args -Om1 \
+; RUN:   -allow-externally-defined-symbols -skip-unimplemented \
+; RUN:   | %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command FileCheck --check-prefix MIPS32 %s
+
+; RUN: %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command %p2i --filetype=asm --assemble \
+; RUN:   --disassemble --target mips32 -i %s --args -O2 \
+; RUN:   -allow-externally-defined-symbols -skip-unimplemented \
+; RUN:   | %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command FileCheck --check-prefix MIPS32-O2 %s

[Jim Stichnoth, 2016/09/14 06:02:18]

It looks like the CHECK patterns are identical for Om1 and O2.

If this is true, and you expect it to continue to be true in the future, then
you could just "--check-prefix MIPS32" as above, and not have to duplicate the
CHECK patterns.

[edit: For testSelectImm32, I see there's a difference with addiu vs move, so
maybe my comment is irrelevant?  Or it could be matched using a regexp.]

[obucinac, 2016/09/14 12:39:02]

Done.

+
 define internal void @testSelect(i32 %a, i32 %b) {
 entry:
   %cmp = icmp slt i32 %a, %b
@@ -61,6 +75,14 @@ declare void @useInt(i32 %x)
 ; ARM32: bl {{.*}} useInt
 ; ARM32: bl {{.*}} useInt
 ; ARM32: bx lr
+; MIPS32-LABEL: testSelect
+; MIPS32: slt {{.*}}
+; MIPS32: movn {{.*}}
+; MIPS32: addiu {{.*}}
+; MIPS32-O2-LABEL: testSelect
+; MIPS32-O2: slt {{.*}}
+; MIPS32-O2: movn {{.*}}
+; MIPS32-O2: move {{.*}}
 
 ; Check for valid addressing mode in the cmp instruction when the
 ; operand is an immediate.
@@ -73,6 +95,12 @@ entry:
 ; CHECK-NOT: cmp 0x{{[0-9a-f]+}},
 ; ARM32-LABEL: testSelectImm32
 ; ARM32-NOT: cmp #{{.*}},
+; MIPS32-LABEL: testSelectImm32
+; MIPS32: movn {{.*}}
+; MIPS32: addiu {{.*}}
+; MIPS32-O2-LABEL: testSelect

[Jim Stichnoth, 2016/09/14 06:02:17]

testSelectImm32

[obucinac, 2016/09/14 12:39:02]

Done.

+; MIPS32-O2: movn {{.*}}
+; MIPS32-O2: move {{.*}}
 
 ; Check for valid addressing mode in the cmp instruction when the
 ; operand is an immediate.  There is a different x86-32 lowering
@@ -86,3 +114,5 @@ entry:
 ; CHECK-NOT: cmp 0x{{[0-9a-f]+}},
 ; ARM32-LABEL: testSelectImm64
 ; ARM32-NOT: cmp #{{.*}},
+; MIPS32-LABEL: testSelectImm64
+; MIPS32-O2-LABEL: testSelectImm64