[arm] Implement barriers on ARMv6 using CP15.

[arm] Implement barriers on ARMv6 using CP15.

ARMv6 has the same basic barriers as ARMv7+, but they are accessed using
the CP15 coprocessor. This patch allows the assembler to select the
appropriate instruction.

This also fixes TurboFan's atomic loads and stores for ARMv6 platforms.

BUG=

Committed: https://crrev.com/1001ddf20f0b8f122207ef76566155518b4248ba
Cr-Commit-Position: refs/heads/master@{#39203}

[jbramley, 2016-09-06 10:23:16]

jacob.bramley@arm.com changed reviewers:
+ bmeurer@chromium.org, epertoso@chromium.org, jarin@chromium.org

[epertoso, 2016-09-06 11:02:30]

lgtm


Thanks.

[jbramley, 2016-09-06 11:02:55]

The CQ bit was checked by jacob.bramley@arm.com

[commit-bot: I haz the power, 2016-09-06 11:03:07]

CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2016-09-06 11:30:02]

Committed patchset #1 (id:1)

[commit-bot: I haz the power, 2016-09-06 11:30:36]

Description was changed from

==========
[arm] Implement barriers on ARMv6 using CP15.

ARMv6 has the same basic barriers as ARMv7+, but they are accessed using
the CP15 coprocessor. This patch allows the assembler to select the
appropriate instruction.

This also fixes TurboFan's atomic loads and stores for ARMv6 platforms.

BUG=
==========

to

==========
[arm] Implement barriers on ARMv6 using CP15.

ARMv6 has the same basic barriers as ARMv7+, but they are accessed using
the CP15 coprocessor. This patch allows the assembler to select the
appropriate instruction.

This also fixes TurboFan's atomic loads and stores for ARMv6 platforms.

BUG=

Committed: https://crrev.com/1001ddf20f0b8f122207ef76566155518b4248ba
Cr-Commit-Position: refs/heads/master@{#39203}
==========

[commit-bot: I haz the power, 2016-09-06 11:30:37]

Patchset 1 (id:??) landed as
https://crrev.com/1001ddf20f0b8f122207ef76566155518b4248ba
Cr-Commit-Position: refs/heads/master@{#39203}