Add GrVkCopyPipeline to handle vulkan copies as draws

src/gpu/vk/GrVkGpuCommandBuffer.cpp

Index: src/gpu/vk/GrVkGpuCommandBuffer.cpp
diff --git a/src/gpu/vk/GrVkGpuCommandBuffer.cpp b/src/gpu/vk/GrVkGpuCommandBuffer.cpp
index a5840699b88dbafdc62b9109bdbc36e6dae89294..81edc2ecf51c4150dfc2dabccc9ef8b41e9d3abd 100644
--- a/src/gpu/vk/GrVkGpuCommandBuffer.cpp
+++ b/src/gpu/vk/GrVkGpuCommandBuffer.cpp
@@ -118,10 +118,12 @@ void GrVkGpuCommandBuffer::onSubmit(const SkIRect& bounds) {
     // we don't attach the resolve to the framebuffer so no need to change its layout.
     GrVkImage* targetImage = fRenderTarget->msaaImage() ? fRenderTarget->msaaImage()
                                                         : fRenderTarget;
+
+    // Change layout of our render target so it can be used as the color attachment
     targetImage->setImageLayout(fGpu,
                                 VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL,
                                 VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT,
-                                VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
+                                VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT,

[jvanverth1, 2016/09/26 17:26:11]

Why this change? (just curious)

[egdaniel, 2016/09/26 21:12:39]

Just from threads about these barriers with other vulkan folk I got the feeling
that TOP/Bottom of pipe weren't really "real" stages and that just using
ALL_GRAPHICS or ALL_STAGES is a safer way to get the results I want (even though
they really should be equivalent).

                                 false);
 
     // If we are using a stencil attachment we also need to update its layout
@@ -131,7 +133,7 @@ void GrVkGpuCommandBuffer::onSubmit(const SkIRect& bounds) {
                                   VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,
                                   VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT |
                                   VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT,
-                                  VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
+                                  VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT,
                                   false);
     }