Chromium Code Reviews| Index: src/IceInstMIPS32.h |
| diff --git a/src/IceInstMIPS32.h b/src/IceInstMIPS32.h |
| index fe3a2a20d2fad882032c9f4974ef049eaf50580f..0c7ad8125e233f6bfe3c39a48026d3eb2008ff88 100644 |
| --- a/src/IceInstMIPS32.h |
| +++ b/src/IceInstMIPS32.h |
| @@ -492,7 +492,64 @@ private: |
| static const char *Opcode; |
| }; |
| -// InstMIPS32Memory represents instructions which loads/stores data on memory |
| +// InstMIPS32Load represents instructions which loads data from memory |
| +// Its format is "OPCODE GPR, OFFSET(BASE GPR)" |
| +template <InstMIPS32::InstKindMIPS32 K> |
| +class InstMIPS32Load : public InstMIPS32 { |
| + InstMIPS32Load() = delete; |
| + InstMIPS32Load(const InstMIPS32Load &) = delete; |
| + InstMIPS32Load &operator=(const InstMIPS32Load &) = delete; |
| + |
| +public: |
| + static InstMIPS32Load *create(Cfg *Func, Variable *Value, |
| + OperandMIPS32Mem *Mem, |
| + RelocOp Reloc = RO_No) { |
| + return new (Func->allocate<InstMIPS32Load>()) |
| + InstMIPS32Load(Func, Value, Mem, Reloc); |
| + } |
| + |
| + void emit(const Cfg *Func) const override { |
| + if (!BuildDefs::dump()) |
| + return; |
| + Ostream &Str = Func->getContext()->getStrEmit(); |
| + assert(getSrcSize() == 1); |
| + Str << "\t" << Opcode << "\t"; |
| + getDest()->emit(Func); |
| + Str << ", "; |
| + emitRelocOp(Str, Reloc); |
| + getSrc(0)->emit(Func); |
| + } |
| + |
| + void emitIAS(const Cfg *Func) const override { |
| + (void)Func; |
| + llvm_unreachable("Not yet implemented"); |
| + } |
| + |
| + void dump(const Cfg *Func) const override { |
| + if (!BuildDefs::dump()) |
| + return; |
| + Ostream &Str = Func->getContext()->getStrDump(); |
| + Str << "\t" << Opcode << "\t"; |
| + getDest()->dump(Func); |
| + Str << ", "; |
| + emitRelocOp(Str, Reloc); |
| + Str << (Reloc ? "(" : ""); |
| + getSrc(0)->dump(Func); |
| + Str << (Reloc ? ")" : ""); |
| + } |
| + static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| + |
| +private: |
| + InstMIPS32Load(Cfg *Func, Variable *Value, OperandMIPS32Mem *Mem, |
| + RelocOp Reloc = RO_No) |
| + : InstMIPS32(Func, K, 2, Value), Reloc(Reloc) { |
| + addSource(Mem); |
| + } |
| + static const char *Opcode; |
| + const RelocOp Reloc; |
| +}; |
| + |
| +// InstMIPS32Memory represents instructions which stores data to memory |
|
Jim Stichnoth
2016/08/18 15:08:55
What do you think about renaming this to InstMIPS3
|
| // Its format is "OPCODE GPR, OFFSET(BASE GPR)" |
| template <InstMIPS32::InstKindMIPS32 K> |
| class InstMIPS32Memory : public InstMIPS32 { |
|
John
2016/08/18 14:53:35
Rename this to InstMIPS32Store?
|
| @@ -757,10 +814,10 @@ using InstMIPS32Div_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_d>; |
| using InstMIPS32Div_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_s>; |
| using InstMIPS32Divu = InstMIPS32ThreeAddrGPR<InstMIPS32::Divu>; |
| using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; |
| -using InstMIPS32Ldc1 = InstMIPS32Memory<InstMIPS32::Ldc1>; |
| +using InstMIPS32Ldc1 = InstMIPS32Load<InstMIPS32::Ldc1>; |
| using InstMIPS32Lui = InstMIPS32UnaryopGPR<InstMIPS32::Lui>; |
| -using InstMIPS32Lw = InstMIPS32Memory<InstMIPS32::Lw>; |
| -using InstMIPS32Lwc1 = InstMIPS32Memory<InstMIPS32::Lwc1>; |
| +using InstMIPS32Lw = InstMIPS32Load<InstMIPS32::Lw>; |
| +using InstMIPS32Lwc1 = InstMIPS32Load<InstMIPS32::Lwc1>; |
| using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>; |
| using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>; |
| using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>; |