[SubZero] Added InstMIPS32Load to differentiate stores from loads

src/IceInstMIPS32.h

 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-===    //
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 474 matching lines @@
   InstMIPS32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0,
                          Variable *Src1)
       : InstMIPS32(Func, K, 2, Dest) {
     addSource(Src0);
     addSource(Src1);
   }
 
   static const char *Opcode;
 };
 
-// InstMIPS32Memory represents instructions which loads/stores data on memory
+// InstMIPS32Load represents instructions which loads data from memory
+// Its format is "OPCODE GPR, OFFSET(BASE GPR)"
+template <InstMIPS32::InstKindMIPS32 K>
+class InstMIPS32Load : public InstMIPS32 {
+  InstMIPS32Load() = delete;
+  InstMIPS32Load(const InstMIPS32Load &) = delete;
+  InstMIPS32Load &operator=(const InstMIPS32Load &) = delete;
+
+public:
+  static InstMIPS32Load *create(Cfg *Func, Variable *Value,
+                                  OperandMIPS32Mem *Mem,
+                                  RelocOp Reloc = RO_No) {
+    return new (Func->allocate<InstMIPS32Load>())
+        InstMIPS32Load(Func, Value, Mem, Reloc);
+  }
+
+  void emit(const Cfg *Func) const override {
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Func->getContext()->getStrEmit();
+    assert(getSrcSize() == 1);
+    Str << "\t" << Opcode << "\t";
+    getDest()->emit(Func);
+    Str << ", ";
+    emitRelocOp(Str, Reloc);
+    getSrc(0)->emit(Func);
+  }
+
+  void emitIAS(const Cfg *Func) const override {
+    (void)Func;
+    llvm_unreachable("Not yet implemented");
+  }
+
+  void dump(const Cfg *Func) const override {
+    if (!BuildDefs::dump())
+      return;
+    Ostream &Str = Func->getContext()->getStrDump();
+    Str << "\t" << Opcode << "\t";
+    getDest()->dump(Func);
+    Str << ", ";
+    emitRelocOp(Str, Reloc);
+    Str << (Reloc ? "(" : "");
+    getSrc(0)->dump(Func);
+    Str << (Reloc ? ")" : "");
+  }
+  static bool classof(const Inst *Inst) { return isClassof(Inst, K); }
+
+private:
+  InstMIPS32Load(Cfg *Func, Variable *Value, OperandMIPS32Mem *Mem,
+                   RelocOp Reloc = RO_No)
+      : InstMIPS32(Func, K, 2, Value), Reloc(Reloc) {
+    addSource(Mem);
+  }
+  static const char *Opcode;
+  const RelocOp Reloc;
+};
+
+// InstMIPS32Memory represents instructions which stores data to memory

[Jim Stichnoth, 2016/08/18 15:08:55]

What do you think about renaming this to InstMIPS32Store, for
consistency/clarity?

 // Its format is "OPCODE GPR, OFFSET(BASE GPR)"
 template <InstMIPS32::InstKindMIPS32 K>
 class InstMIPS32Memory : public InstMIPS32 {

[John, 2016/08/18 14:53:35]

Rename this to InstMIPS32Store?

   InstMIPS32Memory() = delete;
   InstMIPS32Memory(const InstMIPS32Memory &) = delete;
   InstMIPS32Memory &operator=(const InstMIPS32Memory &) = delete;
 
 public:
   static InstMIPS32Memory *create(Cfg *Func, Variable *Value,
                                   OperandMIPS32Mem *Mem,
                                   RelocOp Reloc = RO_No) {
     return new (Func->allocate<InstMIPS32Memory>())
         InstMIPS32Memory(Func, Value, Mem, Reloc);
@@ skipping 241 matching lines @@
 using InstMIPS32Cvt_d_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_l>;
 using InstMIPS32Cvt_d_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_w>;
 using InstMIPS32Cvt_s_d = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_d>;
 using InstMIPS32Cvt_s_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_l>;
 using InstMIPS32Cvt_s_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_w>;
 using InstMIPS32Div = InstMIPS32ThreeAddrGPR<InstMIPS32::Div>;
 using InstMIPS32Div_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_d>;
 using InstMIPS32Div_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_s>;
 using InstMIPS32Divu = InstMIPS32ThreeAddrGPR<InstMIPS32::Divu>;
 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>;
-using InstMIPS32Ldc1 = InstMIPS32Memory<InstMIPS32::Ldc1>;
+using InstMIPS32Ldc1 = InstMIPS32Load<InstMIPS32::Ldc1>;
 using InstMIPS32Lui = InstMIPS32UnaryopGPR<InstMIPS32::Lui>;
-using InstMIPS32Lw = InstMIPS32Memory<InstMIPS32::Lw>;
-using InstMIPS32Lwc1 = InstMIPS32Memory<InstMIPS32::Lwc1>;
+using InstMIPS32Lw = InstMIPS32Load<InstMIPS32::Lw>;
+using InstMIPS32Lwc1 = InstMIPS32Load<InstMIPS32::Lwc1>;
 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>;
 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>;
 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>;
 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>;
 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>;
 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>;
@@ skipping 75 matching lines @@
 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
 template <> void InstMIPS32Lui::emit(const Cfg *Func) const;
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTMIPS32_H