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Unified Diff: src/arm/simulator-arm.cc

Issue 223623003: Fix fixed-point vcvt_f64_s32 immediate value encoding (Closed) Base URL: git://github.com/v8/v8.git@master
Patch Set: Reorder bits for clarity Created 6 years, 9 months ago
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Index: src/arm/simulator-arm.cc
diff --git a/src/arm/simulator-arm.cc b/src/arm/simulator-arm.cc
index 8f7c1e8bb2b740e7884c6ae52c6b867681c9e125..103b570e248c7c8a51f5857177fa6bc7e73e5f9b 100644
--- a/src/arm/simulator-arm.cc
+++ b/src/arm/simulator-arm.cc
@@ -2936,7 +2936,7 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
} else if ((instr->Opc2Value() == 0xA) && (instr->Opc3Value() == 0x3) &&
(instr->Bit(8) == 1)) {
// vcvt.f64.s32 Dd, Dd, #<fbits>
- int fraction_bits = 32 - ((instr->Bit(5) << 4) | instr->Bits(3, 0));
+ int fraction_bits = 32 - ((instr->Bits(3, 0) << 1) | instr->Bit(5));
int fixed_value = get_sinteger_from_s_register(vd * 2);
double divide = 1 << fraction_bits;
set_d_register_from_double(vd, fixed_value / divide);
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