Rework PNaCl memory ordering

docs/PNaClLangRef.rst

Index: docs/PNaClLangRef.rst
diff --git a/docs/PNaClLangRef.rst b/docs/PNaClLangRef.rst
index 75218a0c02465cfee759648dbf229b7776fcd83f..c5d03fe5161b156f5fd0c616f070408b1631ecb1 100644
--- a/docs/PNaClLangRef.rst
+++ b/docs/PNaClLangRef.rst
@@ -143,25 +143,30 @@ Volatile Memory Accesses
 
 `LLVM LangRef: Volatile Memory Accesses <LangRef.html#volatile>`_
 
-PNaCl bitcode does not support volatile memory accesses. The ``volatile``
-attribute on loads and stores is not supported. See the
+PNaCl bitcode does not support volatile memory accesses. The
+``volatile`` attribute on loads and stores is not supported. See the
 `PNaCl Developer's Guide <PNaClDeveloperGuide.html>`_ for more details.
 
 Memory Model for Concurrent Operations
 --------------------------------------
 
-`LLVM LangRef: Memory Model for Concurrent Operations <LangRef.html#memmodel>`_
+`LLVM LangRef: Memory Model for Concurrent Operations
+<LangRef.html#memmodel>`_
 
-See the `PNaCl Developer's Guide <PNaClDeveloperGuide.html>`_ for more details.
+See the `PNaCl Developer's Guide <PNaClDeveloperGuide.html>`_ for more
+details.
 
 Atomic Memory Ordering Constraints
 ----------------------------------
 
 `LLVM LangRef: Atomic Memory Ordering Constraints <LangRef.html#ordering>`_
 
-PNaCl bitcode currently supports sequential consistency only, through its
-`atomic intrinsics`_. See the
-`PNaCl Developer's Guide <PNaClDeveloperGuide.html>`_ for more details.
+PNaCl bitcode currently supports sequential consistency only, through
+its `atomic intrinsics`_. See the `PNaCl Developer's Guide
+<PNaClDeveloperGuide.html>`_ for more details. It supports the usually

[eliben, 2013/08/05 18:35:54]

Parse error on: "the usually C11/C++11 sequential consistency"

[JF, 2013/08/05 20:37:48]

Done.

+C11/C++11 sequential consistency, as well as a stronger form of
+sequential consistency which attempts to act as a barrier for non-atomic
+and non-``volatile`` accesses.
 
 Fast-Math Flags
 ---------------
@@ -410,6 +415,7 @@ The only intrinsics supported by PNaCl bitcode are the following.
 * ``llvm.nacl.atomic.rmw``
 * ``llvm.nacl.atomic.cmpxchg``
 * ``llvm.nacl.atomic.fence``
+* ``llvm.nacl.atomic.is.lock.free``
 
   See :ref:`atomic intrinsics <atomicintrinsics>`.
 
@@ -434,9 +440,9 @@ Setjmp and Longjmp
     declare void @llvm.nacl.longjmp(i8* %jmpbuf, i32)
     declare i32 @llvm.nacl.setjmp(i8* %jmpbuf)
 
-These intrinsics implement the semantics of C11 ``setjmp`` and ``longjmp``. The
-``jmpbuf`` pointer must be 64-bit aligned and point to at least 1024 bytes of
-allocated memory.
+These intrinsics implement the semantics of C11 ``setjmp`` and

[eliben, 2013/08/05 18:35:54]

What are these reformatting changes doing here?

[JF, 2013/08/05 20:37:48]

Enthusiastic select-and-auto-format got a bit further than I intended.

+``longjmp``. The ``jmpbuf`` pointer must be 64-bit aligned and point to
+at least 1024 bytes of allocated memory.
 
 .. _atomicintrinsics:
 
@@ -456,9 +462,9 @@ Atomic intrinsics
             i32 <memory_order_success>, i32 <memory_order_failure>)
     declare void @llvm.nacl.atomic.fence(i32 <memory_order>)
 
-Each of these intrinsics is overloaded on the ``iN`` argument, which
-is reflected through ``<size>`` in the overload's name. Integral types
-of 8, 16, 32 and 64-bit width are supported for these arguments.
+Each of these intrinsics is overloaded on the ``iN`` argument, which is
+reflected through ``<size>`` in the overload's name. Integral types of
+8, 16, 32 and 64-bit width are supported for these arguments.
 
 The ``@llvm.nacl.atomic.rmw`` intrinsic implements the following
 read-modify-write operations, from the general and arithmetic sections
@@ -472,8 +478,8 @@ of the C11/C++11 standards:
  - ``exchange``
 
 For all of these read-modify-write operations, the returned value is
-that at ``object`` before the computation. The ``computation``
-argument must be a compile-time constant.
+that at ``object`` before the computation. The ``computation`` argument
+must be a compile-time constant.
 
 All atomic intrinsics also support C11/C++11 memory orderings, which
 must be compile-time constants. Those are detailed in `Atomic Memory
@@ -486,8 +492,8 @@ in ``"llvm/IR/NaClAtomicIntrinsics.h"``.
 
     These intrinsics allow PNaCl to support C11/C++11 style atomic
     operations as well as some legacy GCC-style ``__sync_*`` builtins
-    while remaining stable as the LLVM codebase changes. The user
-    isn't expected to use these intrinsics directly.
+    while remaining stable as the LLVM codebase changes. The user isn't
+    expected to use these intrinsics directly.
 
 .. code-block:: llvm