| Index: src/compiler/mips64/instruction-selector-mips64.cc
|
| diff --git a/src/compiler/mips64/instruction-selector-mips64.cc b/src/compiler/mips64/instruction-selector-mips64.cc
|
| index 471e50d1dd37faf5eed40a655f248f032c41ce36..c3284aa7ac6b0e08743c4997acac82311d3c6fa9 100644
|
| --- a/src/compiler/mips64/instruction-selector-mips64.cc
|
| +++ b/src/compiler/mips64/instruction-selector-mips64.cc
|
| @@ -1169,32 +1169,10 @@ void InstructionSelector::VisitFloat32Sub(Node* node) {
|
| VisitRRR(this, kMips64SubS, node);
|
| }
|
|
|
| -void InstructionSelector::VisitFloat32SubPreserveNan(Node* node) {
|
| - VisitRRR(this, kMips64SubPreserveNanS, node);
|
| -}
|
| -
|
| void InstructionSelector::VisitFloat64Sub(Node* node) {
|
| - Mips64OperandGenerator g(this);
|
| - Float64BinopMatcher m(node);
|
| - if (m.left().IsMinusZero() && m.right().IsFloat64RoundDown() &&
|
| - CanCover(m.node(), m.right().node())) {
|
| - if (m.right().InputAt(0)->opcode() == IrOpcode::kFloat64Sub &&
|
| - CanCover(m.right().node(), m.right().InputAt(0))) {
|
| - Float64BinopMatcher mright0(m.right().InputAt(0));
|
| - if (mright0.left().IsMinusZero()) {
|
| - Emit(kMips64Float64RoundUp, g.DefineAsRegister(node),
|
| - g.UseRegister(mright0.right().node()));
|
| - return;
|
| - }
|
| - }
|
| - }
|
| VisitRRR(this, kMips64SubD, node);
|
| }
|
|
|
| -void InstructionSelector::VisitFloat64SubPreserveNan(Node* node) {
|
| - VisitRRR(this, kMips64SubPreserveNanD, node);
|
| -}
|
| -
|
| void InstructionSelector::VisitFloat32Mul(Node* node) {
|
| VisitRRR(this, kMips64MulS, node);
|
| }
|
|
|